From: Xiaowei Bao <xiaowei.bao@nxp.com>
To: Zhiqiang.Hou@nxp.com, Minghuan.Lian@nxp.com, mingkai.hu@nxp.com,
bhelgaas@google.com, robh+dt@kernel.org, shawnguo@kernel.org,
leoyang.li@nxp.com, kishon@ti.com, lorenzo.pieralisi@arm.com,
roy.zang@nxp.com, amurray@thegoodpenguin.co.uk,
jingoohan1@gmail.com, gustavo.pimentel@synopsys.com,
linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linuxppc-dev@lists.ozlabs.org
Cc: Xiaowei Bao <xiaowei.bao@nxp.com>
Subject: [PATCH v5 05/11] dt-bindings: pci: layerscape-pci: Add compatible strings for ls1088a and ls2088a
Date: Sat, 7 Mar 2020 10:14:24 +0800 [thread overview]
Message-ID: <20200307021430.36826-6-xiaowei.bao@nxp.com> (raw)
In-Reply-To: <20200307021430.36826-1-xiaowei.bao@nxp.com>
Add compatible strings for ls1088a and ls2088a.
Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
---
v2:
- No change.
v3:
- Use one valid combination of compatible strings.
v4:
- Add the comma between the two compatible.
v5:
- No change.
Documentation/devicetree/bindings/pci/layerscape-pci.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/pci/layerscape-pci.txt b/Documentation/devicetree/bindings/pci/layerscape-pci.txt
index 99a386e..daa99f7 100644
--- a/Documentation/devicetree/bindings/pci/layerscape-pci.txt
+++ b/Documentation/devicetree/bindings/pci/layerscape-pci.txt
@@ -24,6 +24,8 @@ Required properties:
"fsl,ls1028a-pcie"
EP mode:
"fsl,ls1046a-pcie-ep", "fsl,ls-pcie-ep"
+ "fsl,ls1088a-pcie-ep", "fsl,ls-pcie-ep"
+ "fsl,ls2088a-pcie-ep", "fsl,ls-pcie-ep"
- reg: base addresses and lengths of the PCIe controller register blocks.
- interrupts: A list of interrupt outputs of the controller. Must contain an
entry for each entry in the interrupt-names property.
--
2.9.5
next prev parent reply other threads:[~2020-03-07 2:29 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-07 2:14 [PATCH v4 00/11] Add the multiple PF support for DWC and Layerscape Xiaowei Bao
2020-03-07 2:14 ` [PATCH v5 01/11] PCI: designware-ep: Add multiple PFs support for DWC Xiaowei Bao
2020-03-07 2:14 ` [PATCH v5 02/11] PCI: designware-ep: Add the doorbell mode of MSI-X in EP mode Xiaowei Bao
2020-03-07 2:14 ` [PATCH v5 03/11] PCI: designware-ep: Move the function of getting MSI capability forward Xiaowei Bao
2020-03-07 2:14 ` [PATCH v5 04/11] PCI: designware-ep: Modify MSI and MSIX CAP way of finding Xiaowei Bao
2020-03-07 2:14 ` Xiaowei Bao [this message]
2020-03-07 2:14 ` [PATCH v5 06/11] PCI: layerscape: Fix some format issue of the code Xiaowei Bao
2020-03-07 2:14 ` [PATCH v5 07/11] PCI: layerscape: Modify the way of getting capability with different PEX Xiaowei Bao
2020-03-07 2:14 ` [PATCH v5 08/11] PCI: layerscape: Modify the MSIX to the doorbell mode Xiaowei Bao
2020-03-07 2:14 ` [PATCH v5 09/11] PCI: layerscape: Add EP mode support for ls1088a and ls2088a Xiaowei Bao
2020-03-07 2:14 ` [PATCH v5 10/11] arm64: dts: layerscape: Add PCIe EP node for ls1088a Xiaowei Bao
2020-03-07 2:14 ` [PATCH v5 11/11] misc: pci_endpoint_test: Add LS1088a in pci_device_id table Xiaowei Bao
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