From: Mark Rutland <mark.rutland@arm.com>
To: Robin Murphy <robin.murphy@arm.com>
Cc: Qi Liu <liuqi115@huawei.com>,
will@kernel.org, bhelgaas@google.com, linux-pci@vger.kernel.org,
linuxarm@huawei.com, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH RFC] perf:Add driver for HiSilicon PCIe PMU
Date: Fri, 13 Mar 2020 13:59:40 +0000 [thread overview]
Message-ID: <20200313135940.GK42546@lakrids.cambridge.arm.com> (raw)
In-Reply-To: <49a04327-b58b-3103-f992-97e8838c41df@arm.com>
On Fri, Mar 13, 2020 at 01:23:53PM +0000, Robin Murphy wrote:
> On 2020-03-12 12:06 pm, Qi Liu wrote:
> > From: Qi liu <liuqi115@huawei.com>
[...]
> > +#define HISI_PCIE_EVENT_SHIFT_M GENMASK(15, 0)
> > +#define HISI_PCIE_SUBEVENT_SHIFT_M GENMASK(31, 16)
> > +#define HISI_PCIE_SUBEVENT_SHIFT_S 16
> > +#define HISI_PCIE_PORT_SHIFT_M GENMASK(7, 0)
> > +#define HISI_PCIE_FUNC_SHIFT_M GENMASK(15, 8)
> > +#define HISI_PCIE_FUNC_SHIFT_S 8
>
> So "SHIFT_S" means "shift" and "SHIFT_M" actually means "mask"? That's
> unnecessarily confusing. Furthermore it might be helpful if there was a more
> obvious distinction between hardware register fields and config fields.
Also, If you use the FIELD_GET() and FIELD_PREP() helpers, you only need
to define the mask. See <linux/bitfield.h>.
> > +int hisi_pcie_pmu_event_init(struct perf_event *event)
> > +{
> > + struct hisi_pcie_pmu *pcie_pmu = to_pcie_pmu(event->pmu);
> > + struct hw_perf_event *hwc = &event->hw;
> > + u32 subevent_id, event_id, func_id, port_id;
> > +
> > + if (event->attr.type != event->pmu->type)
> > + return -ENOENT;
> > +
> > + /*
> > + * We do not support sampling as the counters are all shared by all
> > + * CPU cores in a CPU die(SCCL). Also we do not support attach to a
>
> Do the PCIe counters have anything to do with CPU clusters at all?
>
> > + * task(per-process mode)
> > + */
> > + if (is_sampling_event(event) || event->attach_state & PERF_ATTACH_TASK)
> > + return -EOPNOTSUPP;
> > +
> > + /*
> > + * The uncore counters not specific to any CPU, so cannot
> > + * support per-task
> > + */
> > + if (event->cpu < 0)
> > + return -EINVAL;
> > +
> > + /*
> > + * Validate if the events in group does not exceed the
> > + * available counters in hardware.
> > + */
> > + if (!hisi_validate_event_group(event))
> > + return -EINVAL;
> > +
> > + event_id = event->attr.config && HISI_PCIE_EVENT_SHIFT_M;
>
> Really? Are you sure you've tested this properly?
If you had:
#define HISI_PCI_EVENT_ID GENMASK(15, 0)
#define HISI_PCI_SUBEVENT_ID GENMASK(31, 16)
... here you could do:
event_id = FIELD_GET(HISI_PCI_EVENT_ID, event->attr.config);
>
> > + subevent_id = (event->attr.config && HISI_PCIE_SUBEVENT_SHIFT_M)
> > + >> HISI_PCIE_SUBEVENT_SHIFT_S;
... and:
subevent_id = FIELD_GET(HISI_PCI_SUBEVENT_ID, event->attr.config);
... and so on for other fields.
Thanks,
Mark.
next prev parent reply other threads:[~2020-03-13 13:59 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-12 12:06 [PATCH RFC] perf:Add driver for HiSilicon PCIe PMU Qi Liu
2020-03-12 20:36 ` Bjorn Helgaas
2020-03-13 6:51 ` Qi Liu
2020-03-13 13:23 ` Robin Murphy
2020-03-13 13:59 ` Mark Rutland [this message]
2020-03-19 1:34 ` Qi Liu
2020-03-13 14:14 ` Jonathan Cameron
2020-03-13 14:50 ` Robin Murphy
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