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From: Ansuel Smith <ansuelsmth@gmail.com>
To: Stanimir Varbanov <svarbanov@mm-sol.com>
Cc: Ansuel Smith <ansuelsmth@gmail.com>,
	Abhishek Sahu <absahu@codeaurora.org>,
	Andy Gross <agross@kernel.org>,
	Bjorn Andersson <bjorn.andersson@linaro.org>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Andrew Murray <amurray@thegoodpenguin.co.uk>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH 04/12] pcie: qcom: Fixed pcie_phy_clk branch issue
Date: Fri, 20 Mar 2020 19:34:46 +0100	[thread overview]
Message-ID: <20200320183455.21311-4-ansuelsmth@gmail.com> (raw)
In-Reply-To: <20200320183455.21311-1-ansuelsmth@gmail.com>

Following backtraces are observed in PCIe deinit operation.

 Hardware name: Qualcomm (Flattened Device Tree)
 (unwind_backtrace) from [] (show_stack+0x10/0x14)
 (show_stack) from [] (dump_stack+0x84/0x98)
 (dump_stack) from [] (warn_slowpath_common+0x9c/0xb8)
 (warn_slowpath_common) from [] (warn_slowpath_fmt+0x30/0x40)
 (warn_slowpath_fmt) from [] (clk_branch_wait+0x114/0x120)
 (clk_branch_wait) from [] (clk_core_disable+0xd0/0x1f4)
 (clk_core_disable) from [] (clk_disable+0x24/0x30)
 (clk_disable) from [] (qcom_pcie_deinit_v0+0x6c/0xb8)
 (qcom_pcie_deinit_v0) from [] (qcom_pcie_host_init+0xe0/0xe8)
 (qcom_pcie_host_init) from [] (dw_pcie_host_init+0x3b0/0x538)
 (dw_pcie_host_init) from [] (qcom_pcie_probe+0x20c/0x2e4)

pcie_phy_clk is generated for PCIe controller itself and the
GCC controls its branch operation. This error is coming since
the assert operations turn off the parent clock before branch
clock. Now this patch moves clk_disable_unprepare before assert
operations.

Similarly, during probe function, the clock branch operation
should be done after dessert operation. Currently, it does not
generate any error since bootloader enables the pcie_phy_clk
but the same error is coming during probe, if bootloader
disables pcie_phy_clk.

Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
---
 drivers/pci/controller/dwc/pcie-qcom.c | 16 +++++++---------
 1 file changed, 7 insertions(+), 9 deletions(-)

diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
index 1fcc7fed8443..596731b54728 100644
--- a/drivers/pci/controller/dwc/pcie-qcom.c
+++ b/drivers/pci/controller/dwc/pcie-qcom.c
@@ -280,6 +280,7 @@ static void qcom_pcie_deinit_2_1_0(struct qcom_pcie *pcie)
 {
 	struct qcom_pcie_resources_2_1_0 *res = &pcie->res.v2_1_0;
 
+	clk_disable_unprepare(res->phy_clk);
 	reset_control_assert(res->pci_reset);
 	reset_control_assert(res->axi_reset);
 	reset_control_assert(res->ahb_reset);
@@ -287,7 +288,6 @@ static void qcom_pcie_deinit_2_1_0(struct qcom_pcie *pcie)
 	reset_control_assert(res->phy_reset);
 	clk_disable_unprepare(res->iface_clk);
 	clk_disable_unprepare(res->core_clk);
-	clk_disable_unprepare(res->phy_clk);
 	clk_disable_unprepare(res->aux_clk);
 	clk_disable_unprepare(res->ref_clk);
 	regulator_bulk_disable(ARRAY_SIZE(res->supplies), res->supplies);
@@ -325,12 +325,6 @@ static int qcom_pcie_init_2_1_0(struct qcom_pcie *pcie)
 		goto err_clk_core;
 	}
 
-	ret = clk_prepare_enable(res->phy_clk);
-	if (ret) {
-		dev_err(dev, "cannot prepare/enable phy clock\n");
-		goto err_clk_phy;
-	}
-
 	ret = clk_prepare_enable(res->aux_clk);
 	if (ret) {
 		dev_err(dev, "cannot prepare/enable aux clock\n");
@@ -383,6 +377,12 @@ static int qcom_pcie_init_2_1_0(struct qcom_pcie *pcie)
 		return ret;
 	}
 
+	ret = clk_prepare_enable(res->phy_clk);
+	if (ret) {
+		dev_err(dev, "cannot prepare/enable phy clock\n");
+		goto err_deassert_ahb;
+	}
+
 	/* wait for clock acquisition */
 	usleep_range(1000, 1500);
 
@@ -400,8 +400,6 @@ static int qcom_pcie_init_2_1_0(struct qcom_pcie *pcie)
 err_clk_ref:
 	clk_disable_unprepare(res->aux_clk);
 err_clk_aux:
-	clk_disable_unprepare(res->phy_clk);
-err_clk_phy:
 	clk_disable_unprepare(res->core_clk);
 err_clk_core:
 	clk_disable_unprepare(res->iface_clk);
-- 
2.25.1


  parent reply	other threads:[~2020-03-20 18:36 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-20 18:34 [PATCH 01/12] pcie: qcom: add missing ipq806x clocks in pcie driver Ansuel Smith
2020-03-20 18:34 ` [PATCH 02/12] devicetree: bindings: pci: add missing clks to qcom,pcie Ansuel Smith
2020-03-31 17:30   ` Rob Herring
2020-03-20 18:34 ` [PATCH 03/12] pcie: qcom: change duplicate pci reset to phy reset Ansuel Smith
2020-03-20 18:34 ` Ansuel Smith [this message]
2020-03-20 18:34 ` [PATCH 05/12] pcie: qcom: add missing reset for ipq806x Ansuel Smith
2020-03-20 18:51   ` Bjorn Helgaas
2020-03-23  6:06   ` Philipp Zabel
2020-03-20 18:34 ` [PATCH 06/12] devicetree: bindings: pci: add ext reset to qcom,pcie Ansuel Smith
2020-03-31 17:31   ` Rob Herring
2020-03-20 18:34 ` [PATCH 07/12] pcie: qcom: add tx term offset support Ansuel Smith
2020-03-20 19:22   ` Bjorn Helgaas
2020-04-01 20:40   ` Bjorn Andersson
2020-04-01 21:55     ` R: " ansuelsmth
2020-04-01 23:52       ` Bjorn Andersson
2020-03-20 18:34 ` [PATCH 08/12] devicetree: bindings: pci: add phy-tx0-term-offset to qcom,pcie Ansuel Smith
2020-03-31 17:32   ` Rob Herring
2020-04-01 12:09     ` R: " ansuelsmth
2020-04-01 20:41   ` Bjorn Andersson
2020-03-20 18:34 ` [PATCH 09/12] pcie: qcom: Programming the PCIE iATU for IPQ806x Ansuel Smith
2020-03-20 19:26   ` Bjorn Helgaas
2020-04-01 13:21   ` Stanimir Varbanov
2020-03-20 18:34 ` [PATCH 10/12] pcie: qcom: add Force GEN1 support Ansuel Smith
2020-03-20 19:37   ` Bjorn Helgaas
2020-03-20 18:34 ` [PATCH 11/12] devicetree: bindings: pci: add force_gen1 for qcom,pcie Ansuel Smith
2020-03-31 17:33   ` Rob Herring
2020-04-01 12:09     ` R: " ansuelsmth
2020-04-01 13:17   ` Stanimir Varbanov
2020-03-20 18:34 ` [PATCH 12/12] pcie: qcom: Set PCIE MRRS and MPS to 256B Ansuel Smith
2020-03-20 19:46   ` Bjorn Helgaas
2020-03-20 18:47 ` [PATCH 01/12] pcie: qcom: add missing ipq806x clocks in pcie driver Bjorn Helgaas
2020-04-01 13:01 ` Stanimir Varbanov

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