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[104.188.17.28]) by smtp.gmail.com with ESMTPSA id nl7sm2408552pjb.36.2020.04.01.13.41.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 01 Apr 2020 13:41:16 -0700 (PDT) Date: Wed, 1 Apr 2020 13:41:13 -0700 From: Bjorn Andersson To: Ansuel Smith Cc: Stanimir Varbanov , Andy Gross , Bjorn Helgaas , Rob Herring , Mark Rutland , Lorenzo Pieralisi , Andrew Murray , Philipp Zabel , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 08/12] devicetree: bindings: pci: add phy-tx0-term-offset to qcom,pcie Message-ID: <20200401204113.GH254911@minitux> References: <20200320183455.21311-1-ansuelsmth@gmail.com> <20200320183455.21311-8-ansuelsmth@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200320183455.21311-8-ansuelsmth@gmail.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org On Fri 20 Mar 11:34 PDT 2020, Ansuel Smith wrote: > Document phy-tx0-term-offset propriety to qcom pcie driver > > Signed-off-by: Ansuel Smith > --- > Documentation/devicetree/bindings/pci/qcom,pcie.txt | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.txt b/Documentation/devicetree/bindings/pci/qcom,pcie.txt > index 6efcef040741..8c1d014f37b0 100644 > --- a/Documentation/devicetree/bindings/pci/qcom,pcie.txt > +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.txt > @@ -254,6 +254,12 @@ > - "perst-gpios" PCIe endpoint reset signal line > - "wake-gpios" PCIe endpoint wake signal line > > +- phy-tx0-term-offset: If I understand your implementation correctly this difference in hardware revision should be encoded in the compatible string. Regards, Bjorn > + Usage: optional > + Value type: > + Definition: If not defined is 0. In ipq806x is set to 7. In newer > + revision (v2.0) the offset is zero. > + > * Example for ipq/apq8064 > pcie@1b500000 { > compatible = "qcom,pcie-apq8064", "qcom,pcie-ipq8064", "snps,dw-pcie"; > @@ -293,6 +299,7 @@ > reset-names = "axi", "ahb", "por", "pci", "phy", "ext"; > pinctrl-0 = <&pcie_pins_default>; > pinctrl-names = "default"; > + phy-tx0-term-offset = <7>; > }; > > * Example for apq8084 > -- > 2.25.1 >