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From: Sean V Kelley <>
Cc:, Sean V Kelley <>
Subject: [RFC Patch 0/1] pciutils: Add basic decode support for CXL
Date: Tue,  7 Apr 2020 17:09:58 -0700	[thread overview]
Message-ID: <> (raw)

Compute eXpress Link[1] is a new CPU interconnected created with
workload accelerators in mind. The interconnect relies on PCIe Electrial
and Physical interconnect for communication.

Moreover, CXL bus hierarchy appear, to the OS, as an ACPI-described PCIe
Root Bridge with Integrated Endpoint.

I'm interested in feedback on how best to handle the case of DVSEC for CXL.
Up until this point it has been a catch-all:

- printf("Designated Vendor-Specific <?>\n");
+ cap_cxl(d, where);

Should I retain the general printf() in the case of the absence of CXL?
Or other suggestions?

Best regards,



Sean V Kelley (1):
  lspci: Add basic decode support for Compute eXpress Link

 lib/header.h        | 25 +++++++++++++++++++++++++
 ls-ecaps.c          | 29 ++++++++++++++++++++++++++++-
 tests/cap-cxl-dvsec |  8 ++++++++
 3 files changed, 61 insertions(+), 1 deletion(-)
 create mode 100644 tests/cap-cxl-dvsec


             reply	other threads:[~2020-04-08  0:10 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-08  0:09 Sean V Kelley [this message]
2020-04-08  0:09 ` [RFC Patch 1/1] lspci: Add basic decode support for Compute eXpress Link Sean V Kelley
2020-04-08 16:56   ` Bjorn Helgaas
2020-04-08 21:12     ` Sean V Kelley
2020-04-08 21:47       ` Bjorn Helgaas

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