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From: Jon Derrick <jonathan.derrick@intel.com>
To: <linux-pci@vger.kernel.org>
Cc: Bjorn Helgaas <helgaas@kernel.org>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Russell King <rmk+kernel@armlinux.org.uk>,
	Jon Derrick <jonathan.derrick@intel.com>
Subject: [PATCH 3/5] PCI: pci-bridge-emul: Convert to GENMASK and BIT
Date: Tue, 14 Apr 2020 16:30:03 -0400	[thread overview]
Message-ID: <20200414203005.5166-4-jonathan.derrick@intel.com> (raw)
In-Reply-To: <20200414203005.5166-1-jonathan.derrick@intel.com>

In order to make pci-bridge-emul easier to keep up-to-date with new PCIe
features, convert all named register bits to GENMASK and BIT pairs. This
patch doesn't alter any of the PCI configuration space as these bits are
fully defined.

Signed-off-by: Jon Derrick <jonathan.derrick@intel.com>
---
 drivers/pci/pci-bridge-emul.c | 17 ++++++-----------
 1 file changed, 6 insertions(+), 11 deletions(-)

diff --git a/drivers/pci/pci-bridge-emul.c b/drivers/pci/pci-bridge-emul.c
index c00c30ffb198..bbcccadca85e 100644
--- a/drivers/pci/pci-bridge-emul.c
+++ b/drivers/pci/pci-bridge-emul.c
@@ -221,11 +221,8 @@ static const struct pci_bridge_reg_behavior pcie_cap_regs_behavior[] = {
 		 * as reserved bits.
 		 */
 		.rw = GENMASK(12, 0),
-		.w1c = (PCI_EXP_SLTSTA_ABP | PCI_EXP_SLTSTA_PFD |
-			PCI_EXP_SLTSTA_MRLSC | PCI_EXP_SLTSTA_PDC |
-			PCI_EXP_SLTSTA_CC | PCI_EXP_SLTSTA_DLLSC) << 16,
-		.ro = (PCI_EXP_SLTSTA_MRLSS | PCI_EXP_SLTSTA_PDS |
-		       PCI_EXP_SLTSTA_EIS) << 16,
+		.w1c = (BIT(8) | GENMASK(4, 0)) << 16,
+		.ro = GENMASK(7, 5) << 16,
 		.rsvd = GENMASK(15, 13) | (GENMASK(15, 9) << 16),
 	},
 
@@ -236,10 +233,8 @@ static const struct pci_bridge_reg_behavior pcie_cap_regs_behavior[] = {
 		 *
 		 * Root capabilities has bit 0 RO, the rest is reserved.
 		 */
-		.rw = (PCI_EXP_RTCTL_SECEE | PCI_EXP_RTCTL_SENFEE |
-		       PCI_EXP_RTCTL_SEFEE | PCI_EXP_RTCTL_PMEIE |
-		       PCI_EXP_RTCTL_CRSSVE),
-		.ro = PCI_EXP_RTCAP_CRSVIS << 16,
+		.rw = GENMASK(4, 0),
+		.ro = BIT(0) << 16,
 		.rsvd = GENMASK(15, 5) | (GENMASK(15, 1) << 16),
 	},
 
@@ -248,8 +243,8 @@ static const struct pci_bridge_reg_behavior pcie_cap_regs_behavior[] = {
 		 * Root status has bits 17 and [15:0] RO, bit 16 W1C, the rest
 		 * is reserved.
 		 */
-		.ro = GENMASK(15, 0) | PCI_EXP_RTSTA_PENDING,
-		.w1c = PCI_EXP_RTSTA_PME,
+		.ro = BIT(17) | GENMASK(15, 0),
+		.w1c = BIT(16),
 		.rsvd = GENMASK(31, 18),
 	},
 };
-- 
2.18.1


  parent reply	other threads:[~2020-04-14 20:45 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-14 20:30 [PATCH 0/5] PCI Bridge Emulation changes for v5.8 Jon Derrick
2020-04-14 20:30 ` [PATCH 1/5] PCI: pci-bridge-emul: Fix PCIe bit conflicts Jon Derrick
2020-05-07 19:48   ` Rob Herring
2020-04-14 20:30 ` [PATCH 2/5] PCI: pci-bridge-emul: Fix Root Cap/Status comment Jon Derrick
2020-05-07 19:48   ` Rob Herring
2020-04-14 20:30 ` Jon Derrick [this message]
2020-04-16  7:30   ` [PATCH 3/5] PCI: pci-bridge-emul: Convert to GENMASK and BIT Christoph Hellwig
2020-04-16 14:35     ` Derrick, Jonathan
2020-05-11 10:06       ` Lorenzo Pieralisi
2020-05-11 15:11         ` Derrick, Jonathan
2020-04-14 20:30 ` [PATCH 4/5] PCI: pci-bridge-emul: Update for PCIe 5.0 r1.0 Jon Derrick
2020-05-07 19:49   ` Rob Herring
2020-04-14 20:30 ` [PATCH 5/5] PCI: pci-bridge-emul: Eliminate the 'reserved' member Jon Derrick
2020-05-07 20:00   ` Rob Herring

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