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From: "Pali Rohár" <pali@kernel.org>
To: "Jason Cooper" <jason@lakedaemon.net>,
	"Andrew Lunn" <andrew@lunn.ch>,
	"Gregory Clement" <gregory.clement@bootlin.com>,
	"Sebastian Hesselbarth" <sebastian.hesselbarth@gmail.com>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Thomas Petazzoni" <thomas.petazzoni@bootlin.com>,
	"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
	"Andrew Murray" <amurray@thegoodpenguin.co.uk>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Remi Pommarel" <repk@triplefau.lt>,
	"Marek Behún" <marek.behun@nic.cz>,
	"Tomasz Maciej Nowak" <tmn505@gmail.com>,
	Xogium <contact@xogium.me>
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-pci@vger.kernel.org
Subject: Re: [PATCH 8/8] PCI: aardvark: Add FIXME for code which access PCIE_CORE_CMD_STATUS_REG
Date: Wed, 15 Apr 2020 18:18:36 +0200	[thread overview]
Message-ID: <20200415161836.lqbhr6bona7zmgpt@pali> (raw)
In-Reply-To: <20200415160348.1146-4-pali@kernel.org>

On Wednesday 15 April 2020 18:03:48 Pali Rohár wrote:
> Register PCIE_CORE_CMD_STATUS_REG is applicable only when aardvark
> controller is configured for Endpoint mode. Which is not the case of
> current kernel driver.
> 
> Signed-off-by: Pali Rohár <pali@kernel.org>
> ---
>  drivers/pci/controller/pci-aardvark.c | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c
> index 6a97a3838098..a1cebc734f2d 100644
> --- a/drivers/pci/controller/pci-aardvark.c
> +++ b/drivers/pci/controller/pci-aardvark.c
> @@ -423,6 +423,12 @@ static void advk_pcie_setup_hw(struct advk_pcie *pcie)
>  		advk_writel(pcie, reg, PCIE_CORE_LINK_CTRL_STAT_REG);
>  	} while (1);
>  
> +	/*
> +	 * FIXME: Following code which access PCIE_CORE_CMD_STATUS_REG register
> +	 *        is suspicious. This register is applicable only when the PCI
> +	 *        controller is configured for Endpoint mode. And not when it
> +	 *        is configured for Root Complex.
> +	 */
>  	reg = advk_readl(pcie, PCIE_CORE_CMD_STATUS_REG);
>  	reg |= PCIE_CORE_CMD_MEM_ACCESS_EN |
>  		PCIE_CORE_CMD_IO_ACCESS_EN |
> -- 
> 2.20.1
> 

Just to note, above code needs to be removed or fixed or properly
commented why is correct and what is doing.

I really do not know, so I'm adding at least FIXME comment to document
suspicious code which may cause unexpected problems.

  reply	other threads:[~2020-04-15 16:18 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-15 16:00 [PATCH 0/8] PCI: aardvark: Fix support for Turris MOX and Compex wifi cards Pali Rohár
2020-04-15 16:00 ` [PATCH 1/8] PCI: aardvark: Set controller speed from Device Tree max-link-speed Pali Rohár
2020-04-15 16:00 ` [PATCH 2/8] dts: espressobin: Define max-link-speed for pcie0 Pali Rohár
2020-04-19  3:19   ` Marek Behun
2020-04-15 16:00 ` [PATCH 3/8] PCI: aardvark: Start link training immediately after enabling link training Pali Rohár
2020-04-15 16:00 ` [PATCH 4/8] PCI: aardvark: Do not overwrite Link Status register and ASPM Control bits in Link Control register Pali Rohár
2020-04-15 16:03 ` [PATCH 5/8] PCI: aardvark: Set final controller speed based on negotiated link speed Pali Rohár
2020-04-19  3:17   ` Marek Behun
2020-04-15 16:03 ` [PATCH 6/8] PCI: aardvark: Add support for issuing PERST via GPIO Pali Rohár
2020-04-19  3:23   ` Marek Behun
2020-04-15 16:03 ` [PATCH 7/8] dts: aardvark: Route pcie reset pin to gpio function and define reset-gpios for pcie Pali Rohár
2020-04-19  3:54   ` Marek Behun
2020-04-15 16:03 ` [PATCH 8/8] PCI: aardvark: Add FIXME for code which access PCIE_CORE_CMD_STATUS_REG Pali Rohár
2020-04-15 16:18   ` Pali Rohár [this message]
2020-04-16 15:50 ` [PATCH 0/8] PCI: aardvark: Fix support for Turris MOX and Compex wifi cards Tomasz Maciej Nowak
2020-04-19  4:01 ` Marek Behun

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