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From: Kishon Vijay Abraham I <kishon@ti.com>
To: Tom Joseph <tjoseph@cadence.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Rob Herring <robh+dt@kernel.org>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Andrew Murray <amurray@thegoodpenguin.co.uk>
Cc: <linux-pci@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>
Subject: [PATCH v2 4/4] PCI: cadence: Fix to read 32-bit Vendor ID/Device ID property from DT
Date: Fri, 17 Apr 2020 17:13:22 +0530	[thread overview]
Message-ID: <20200417114322.31111-5-kishon@ti.com> (raw)
In-Reply-To: <20200417114322.31111-1-kishon@ti.com>

The PCI Bus Binding specification (IEEE Std 1275-1994 Revision 2.1 [1])
defines both Vendor ID and Device ID to be 32-bits. Fix
pcie-cadence-host.c driver to read 32-bit Vendor ID and Device ID
properties from device tree.

[1] -> https://www.devicetree.org/open-firmware/bindings/pci/pci2_1.pdf

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
 drivers/pci/controller/cadence/pcie-cadence-host.c | 4 ++--
 drivers/pci/controller/cadence/pcie-cadence.h      | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/pci/controller/cadence/pcie-cadence-host.c b/drivers/pci/controller/cadence/pcie-cadence-host.c
index 8f72967f298f..31e67c9c88cf 100644
--- a/drivers/pci/controller/cadence/pcie-cadence-host.c
+++ b/drivers/pci/controller/cadence/pcie-cadence-host.c
@@ -229,10 +229,10 @@ int cdns_pcie_host_setup(struct cdns_pcie_rc *rc)
 	}
 
 	rc->vendor_id = 0xffff;
-	of_property_read_u16(np, "vendor-id", &rc->vendor_id);
+	of_property_read_u32(np, "vendor-id", &rc->vendor_id);
 
 	rc->device_id = 0xffff;
-	of_property_read_u16(np, "device-id", &rc->device_id);
+	of_property_read_u32(np, "device-id", &rc->device_id);
 
 	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "reg");
 	pcie->reg_base = devm_ioremap_resource(dev, res);
diff --git a/drivers/pci/controller/cadence/pcie-cadence.h b/drivers/pci/controller/cadence/pcie-cadence.h
index 6bd89a21bb1c..df14ad002fe9 100644
--- a/drivers/pci/controller/cadence/pcie-cadence.h
+++ b/drivers/pci/controller/cadence/pcie-cadence.h
@@ -262,8 +262,8 @@ struct cdns_pcie_rc {
 	struct resource		*bus_range;
 	void __iomem		*cfg_base;
 	u32			no_bar_nbits;
-	u16			vendor_id;
-	u16			device_id;
+	u32			vendor_id;
+	u32			device_id;
 };
 
 /**
-- 
2.17.1


  parent reply	other threads:[~2020-04-17 11:43 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-17 11:43 [PATCH v2 0/4] PCI: cadence: Deprecate inbound/outbound specific bindings Kishon Vijay Abraham I
2020-04-17 11:43 ` [PATCH v2 1/4] dt-bindings: " Kishon Vijay Abraham I
2020-04-17 11:43 ` [PATCH v2 2/4] PCI: cadence: Use "dma-ranges" instead of "cdns,no-bar-match-nbits" property Kishon Vijay Abraham I
2020-05-01 14:46   ` Lorenzo Pieralisi
2020-05-01 15:54     ` Robin Murphy
2020-05-04  8:44       ` Kishon Vijay Abraham I
2020-05-04 10:54         ` Robin Murphy
2020-05-04 12:53           ` Kishon Vijay Abraham I
2020-05-06  3:22             ` Kishon Vijay Abraham I
2020-05-07 20:26               ` Rob Herring
2020-05-08  8:49                 ` Kishon Vijay Abraham I
2020-05-08 11:51                   ` Kishon Vijay Abraham I
2020-04-17 11:43 ` [PATCH v2 3/4] PCI: cadence: Remove "cdns,max-outbound-regions" DT property Kishon Vijay Abraham I
2020-05-07 20:27   ` Rob Herring
2020-04-17 11:43 ` Kishon Vijay Abraham I [this message]
2020-05-01 15:11   ` [PATCH v2 4/4] PCI: cadence: Fix to read 32-bit Vendor ID/Device ID property from DT Lorenzo Pieralisi
2020-05-04  8:52     ` Kishon Vijay Abraham I
2020-05-04 11:25       ` Lorenzo Pieralisi
2020-05-07 20:27   ` Rob Herring
2020-05-06 17:16 ` [PATCH v2 0/4] PCI: cadence: Deprecate inbound/outbound specific bindings Tom Joseph

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