From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE, SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C84A5C28CBC for ; Wed, 6 May 2020 21:29:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A19732078C for ; Wed, 6 May 2020 21:29:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1588800590; bh=XMODf73qdY1pBEPZqbcgGU49OOeQf5NflglZA7mOg1k=; h=Date:From:To:Cc:Subject:In-Reply-To:List-ID:From; b=vh1b9NE1tfHNUvY0PVdRwYnhxriSZNYSzaVec8WADtdyKcfPOKO4/J6ai2BRjZBmK GsZelSCMOoYoZdtlF3m93tRcVtcSOTU8bjGPSE2aghMhcEW+IDKNTotSihNxFvVjsR C1NHwkTFmo80UDzqLJFLWiTH5CiGrqfkVKW7iOfs= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729162AbgEFV3u (ORCPT ); Wed, 6 May 2020 17:29:50 -0400 Received: from mail.kernel.org ([198.145.29.99]:54404 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726927AbgEFV3t (ORCPT ); Wed, 6 May 2020 17:29:49 -0400 Received: from localhost (mobile-166-175-190-200.mycingular.net [166.175.190.200]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id EC31C2070B; Wed, 6 May 2020 21:29:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1588800589; bh=XMODf73qdY1pBEPZqbcgGU49OOeQf5NflglZA7mOg1k=; h=Date:From:To:Cc:Subject:In-Reply-To:From; b=w6td1PRYmzZANGSumMXG6yHUCkJNf+vnnBIWMD2l2XCpZmt52cK9zt6pbuF/L9UIP VZlkXyQ0axjjAOeLIngA/ZzOBG7WL/7VQ87UR62+MTc5wAX2d7aQvfIYv/9eBPIAeE j0uRIcv/zrrP0lXbNDHjR4FdNzAcUINFXweFhgoc= Date: Wed, 6 May 2020 16:29:47 -0500 From: Bjorn Helgaas To: Mika Westerberg Cc: Kai-Heng Feng , bhelgaas@google.com, Heiner Kallweit , "Rafael J. Wysocki" , Keith Busch , Chris Packham , Yicong Yang , Krzysztof Wilczynski , "open list:PCI SUBSYSTEM" , open list Subject: Re: [PATCH v3] PCI/ASPM: Enable ASPM for bridge-to-bridge link Message-ID: <20200506212947.GA455758@bjorn-Precision-5520> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200506061438.GR487496@lahna.fi.intel.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org On Wed, May 06, 2020 at 09:14:38AM +0300, Mika Westerberg wrote: > On Wed, May 06, 2020 at 01:34:21AM +0800, Kai-Heng Feng wrote: > > The TI PCIe-to-PCI bridge prevents the Intel SoC from entering power > > state deeper than PC3 due to disabled ASPM, consumes lots of unnecessary > > power. On Windows ASPM L1 is enabled on the device and its upstream > > bridge, so it can make the Intel SoC reach PC8 or PC10 to save lots of > > power. > > > > In short, ASPM always gets disabled on bridge-to-bridge link. > > Excelent finding :) I've heard several reports complaining that we can't > enter PC10 when TBT is enabled and I guess this explains it. I'm curious about this. I first read this patch as affecting garden-variety Links between a Root Port or Downstream Port and the Upstream Port of a switch. But the case we're talking about is specifically when the downstream device is PCI_EXP_TYPE_PCI_BRIDGE, i.e., a PCIe to PCI/PCI-X bridge, not a switch. AFAICT, a Link to a PCI bridge is still a normal Link and ASPM should still work. I'm sort of surprised that you'd find such a PCIe to PCI/PCI-X bridge in a Thunderbolt topology, but maybe that's a common thing? I guess "PC8" and "PC10" are some sort of Intel-specific power states? > > The special case was part of first ASPM introduction patch, commit > > 7d715a6c1ae5 ("PCI: add PCI Express ASPM support"). However, it didn't > > explain why ASPM needs to be disabled in special bridge-to-bridge case. > > > > Let's remove the the special case, as PCIe spec already envisioned ASPM > > on bridge-to-bridge link. > > > > Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=207571 > > Signed-off-by: Kai-Heng Feng > > Reviewed-by: Mika Westerberg