From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
To: Dinghao Liu <dinghao.liu@zju.edu.cn>
Cc: kjlu@umn.edu, Tom Joseph <tjoseph@cadence.com>,
Rob Herring <robh@kernel.org>,
Bjorn Helgaas <bhelgaas@google.com>,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] PCI: cadence: fix runtime pm imbalance on error
Date: Mon, 6 Jul 2020 12:12:00 +0100 [thread overview]
Message-ID: <20200706111200.GE26377@e121166-lin.cambridge.arm.com> (raw)
In-Reply-To: <20200520090253.2761-1-dinghao.liu@zju.edu.cn>
On Wed, May 20, 2020 at 05:02:53PM +0800, Dinghao Liu wrote:
> pm_runtime_get_sync() increments the runtime PM usage counter even
> it returns an error code. Thus a pairing decrement is needed on
> the error handling path to keep the counter balanced.
>
> Signed-off-by: Dinghao Liu <dinghao.liu@zju.edu.cn>
> ---
> drivers/pci/controller/cadence/pcie-cadence-plat.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/drivers/pci/controller/cadence/pcie-cadence-plat.c b/drivers/pci/controller/cadence/pcie-cadence-plat.c
> index f5c6bf6dfcb8..33c3868e6dbd 100644
> --- a/drivers/pci/controller/cadence/pcie-cadence-plat.c
> +++ b/drivers/pci/controller/cadence/pcie-cadence-plat.c
> @@ -115,9 +115,8 @@ static int cdns_plat_pcie_probe(struct platform_device *pdev)
> }
>
> err_init:
> - pm_runtime_put_sync(dev);
> -
> err_get_sync:
> + pm_runtime_put_sync(dev);
> pm_runtime_disable(dev);
> cdns_pcie_disable_phy(cdns_plat_pcie->pcie);
> phy_count = cdns_plat_pcie->pcie->phy_count;
Applied to pci/runtime-pm, thanks.
Lorenzo
prev parent reply other threads:[~2020-07-06 11:12 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-20 9:02 [PATCH] PCI: cadence: fix runtime pm imbalance on error Dinghao Liu
2020-07-06 11:12 ` Lorenzo Pieralisi [this message]
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