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[84.0.113.134]) by smtp.gmail.com with ESMTPSA id f10sm27096310edx.5.2020.07.07.16.03.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Jul 2020 16:03:58 -0700 (PDT) From: Saheed Olayemi Bolarinwa To: helgaas@kernel.org Cc: Bolarinwa Olayemi Saheed , bjorn@helgaas.com, skhan@linuxfoundation.org, linux-pci@vger.kernel.org, linux-kernel-mentees@lists.linuxfoundation.org, linux-kernel@vger.kernel.org, Russell Currey , Sam Bobroff , "Oliver O'Halloran" , linuxppc-dev@lists.ozlabs.org, "Rafael J. Wysocki" , Len Brown , Lukas Wunner , linux-acpi@vger.kernel.org, Mike Marciniszyn , Dennis Dalessandro , Doug Ledford , Jason Gunthorpe , linux-rdma@vger.kernel.org, Arnd Bergmann , Greg Kroah-Hartman , "David S. Miller" , Kalle Valo , Jakub Kicinski , QCA ath9k Development , linux-wireless@vger.kernel.org, netdev@vger.kernel.org, Stanislaw Gruszka Subject: [PATCH 13/13] PCI: Remove '*val = 0' from pcie_capability_read_*() Date: Wed, 8 Jul 2020 00:03:24 +0200 Message-Id: <20200707220324.8425-14-refactormyself@gmail.com> X-Mailer: git-send-email 2.18.2 In-Reply-To: <20200707220324.8425-1-refactormyself@gmail.com> References: <20200707220324.8425-1-refactormyself@gmail.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Bolarinwa Olayemi Saheed There are several reasons why a PCI capability read may fail whether the device is present or not. If this happens, pcie_capability_read_*() will return -EINVAL/PCIBIOS_BAD_REGISTER_NUMBER or PCIBIOS_DEVICE_NOT_FOUND and *val is set to 0. This behaviour if further ensured by this code inside pcie_capability_read_*() ret = pci_read_config_dword(dev, pci_pcie_cap(dev) + pos, val); /* * Reset *val to 0 if pci_read_config_dword() fails, it may * have been written as 0xFFFFFFFF if hardware error happens * during pci_read_config_dword(). */ if (ret) *val = 0; return ret; a) Since all pci_generic_config_read() does is read a register value, it may return success after reading a ~0 which *may* have been fabricated by the PCI host bridge due to a read timeout. Hence pci_read_config_*() will return success with a fabricated ~0 in *val, indicating a problem. In this case, the assumed behaviour of pcie_capability_read_*() will be wrong. To avoid error slipping through, more checks are necessary. b) pci_read_config_*() will return PCIBIOS_DEVICE_NOT_FOUND only if dev->error_state = pci_channel_io_perm_failure (i.e. pci_dev_is_disconnected()) or if pci_generic_config_read() can't find the device. In both cases *val is initially set to ~0 but as shown in the code above pcie_capability_read_*() resets it back to 0. Even with this effort, drivers still have to perform validation checks more so if 0 is a valid value. Most drivers only consider the case (b) and in some cases, there is the expectation that on timeout *val has a fabricated value of ~0, which *may* not always be true as explained in (a). In any case, checks need to be done to validate the value read and maybe confirm which error has occurred. It is better left to the drivers to do. Remove the reset of *val to 0 when pci_read_config_*() fails. Suggested-by: Bjorn Helgaas Signed-off-by: Bolarinwa Olayemi Saheed --- This patch depends on all of the preceeding patches in this series, otherwise it will introduce bugs as pointed out in the commit message of each. drivers/pci/access.c | 14 -------------- 1 file changed, 14 deletions(-) diff --git a/drivers/pci/access.c b/drivers/pci/access.c index 79c4a2ef269a..ec95edbb1ac8 100644 --- a/drivers/pci/access.c +++ b/drivers/pci/access.c @@ -413,13 +413,6 @@ int pcie_capability_read_word(struct pci_dev *dev, int pos, u16 *val) if (pcie_capability_reg_implemented(dev, pos)) { ret = pci_read_config_word(dev, pci_pcie_cap(dev) + pos, val); - /* - * Reset *val to 0 if pci_read_config_word() fails, it may - * have been written as 0xFFFF if hardware error happens - * during pci_read_config_word(). - */ - if (ret) - *val = 0; return ret; } @@ -448,13 +441,6 @@ int pcie_capability_read_dword(struct pci_dev *dev, int pos, u32 *val) if (pcie_capability_reg_implemented(dev, pos)) { ret = pci_read_config_dword(dev, pci_pcie_cap(dev) + pos, val); - /* - * Reset *val to 0 if pci_read_config_dword() fails, it may - * have been written as 0xFFFFFFFF if hardware error happens - * during pci_read_config_dword(). - */ - if (ret) - *val = 0; return ret; } -- 2.18.2