From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
To: Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>
Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
bhelgaas@google.com, robh@kernel.org, maz@kernel.org
Subject: Re: [PATCH v9 0/2] Adding support for Versal CPM as Root Port driver
Date: Mon, 13 Jul 2020 14:56:58 +0100 [thread overview]
Message-ID: <20200713135658.GA27845@e121166-lin.cambridge.arm.com> (raw)
In-Reply-To: <1592312214-9347-1-git-send-email-bharat.kumar.gogada@xilinx.com>
On Tue, Jun 16, 2020 at 06:26:52PM +0530, Bharat Kumar Gogada wrote:
> - Adding support for Versal CPM as Root port.
> - The Versal ACAP devices include CCIX-PCIe Module (CPM). The integrated
> block for CPM along with the integrated bridge can function
> as PCIe Root Port.
> - Versal CPM uses GICv3 ITS feature for assigning MSI/MSI-X
> vectors and handling MSI/MSI-X interrupts.
> - Bridge error and legacy interrupts in Versal CPM are handled using
> Versal CPM specific interrupt line.
>
> Changes for v9:
> - Removed interrupt enablement outside irqchip flow as suggested
> by Marc.
> - Removed using WARN_ON in if statement.
>
> Bharat Kumar Gogada (2):
> PCI: xilinx-cpm: Add YAML schemas for Versal CPM Root Port
> PCI: xilinx-cpm: Add Versal CPM Root Port driver
>
> .../devicetree/bindings/pci/xilinx-versal-cpm.yaml | 99 ++++
> drivers/pci/controller/Kconfig | 8 +
> drivers/pci/controller/Makefile | 1 +
> drivers/pci/controller/pcie-xilinx-cpm.c | 615 +++++++++++++++++++++
> 4 files changed, 723 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml
> create mode 100644 drivers/pci/controller/pcie-xilinx-cpm.c
Applied to pci/xilinx (I removed a function kerneldoc comment
(xilinx_cpm_pcie_clear_err_interrupts()) since it was not matching
the function name and honestly it is not really needed) for v5.9.
Thanks,
Lorenzo
prev parent reply other threads:[~2020-07-13 13:57 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-16 12:56 [PATCH v9 0/2] Adding support for Versal CPM as Root Port driver Bharat Kumar Gogada
2020-06-16 12:56 ` [PATCH v9 1/2] PCI: xilinx-cpm: Add YAML schemas for Versal CPM Root Port Bharat Kumar Gogada
2020-07-10 15:04 ` Rob Herring
2020-06-16 12:56 ` [PATCH v9 2/2] PCI: xilinx-cpm: Add Versal CPM Root Port driver Bharat Kumar Gogada
2020-06-25 11:47 ` Bharat Kumar Gogada
2020-07-10 15:16 ` Rob Herring
2020-07-13 11:26 ` Lorenzo Pieralisi
2020-07-13 12:24 ` Bharat Kumar Gogada
2020-07-14 14:17 ` Rob Herring
2020-08-05 20:43 ` Bjorn Helgaas
2020-08-05 21:39 ` Lorenzo Pieralisi
2020-08-05 22:03 ` Bjorn Helgaas
2020-08-05 23:30 ` Bjorn Helgaas
2020-08-06 9:54 ` Lorenzo Pieralisi
2020-08-06 13:13 ` Bjorn Helgaas
2020-07-13 13:56 ` Lorenzo Pieralisi [this message]
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