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From: Logan Gunthorpe <logang@deltatee.com>
To: linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org
Cc: "Logan Gunthorpe" <logang@deltatee.com>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Alex Deucher" <alexdeucher@gmail.com>,
	"Christian König" <christian.koenig@amd.com>,
	"Huang Rui" <ray.huang@amd.com>
Subject: [PATCH v2] PCI/P2PDMA: Allow P2PDMA on all AMD CPUs newer than the Zen family
Date: Wed, 29 Jul 2020 17:18:44 -0600
Message-ID: <20200729231844.4653-1-logang@deltatee.com> (raw)

In order to avoid needing to add every new AMD CPU host bridge to the list
every cycle, allow P2PDMA if the CPUs vendor is AMD and family is
greater than 0x17 (Zen).

This should cut down a bunch of the churn adding to the list of allowed
host bridges.

Signed-off-by: Logan Gunthorpe <logang@deltatee.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Alex Deucher <alexdeucher@gmail.com>
Cc: Christian König <christian.koenig@amd.com>
Cc: Huang Rui <ray.huang@amd.com>

---

Here's a reworked patch to enable P2PDMA on Zen2 (and in fact all
subsequent Zen platforms).

This should remove all the churn on the list for the AMD side. Still
don't have a good solution for Intel.

 drivers/pci/p2pdma.c | 26 ++++++++++++++++++++------
 1 file changed, 20 insertions(+), 6 deletions(-)

diff --git a/drivers/pci/p2pdma.c b/drivers/pci/p2pdma.c
index e8e444eeb1cd..f1cab2c50595 100644
--- a/drivers/pci/p2pdma.c
+++ b/drivers/pci/p2pdma.c
@@ -273,6 +273,24 @@ static void seq_buf_print_bus_devfn(struct seq_buf *buf, struct pci_dev *pdev)
 	seq_buf_printf(buf, "%s;", pci_name(pdev));
 }

+#ifdef CONFIG_X86
+static bool cpu_supports_p2pdma(void)
+{
+	struct cpuinfo_x86 *c = &cpu_data(0);
+
+	/* Any AMD CPU who's family id is newer than Zen will support p2pdma */
+	if (c->x86_vendor == X86_VENDOR_AMD && c->x86 >= 0x17)
+		return true;
+
+	return false;
+}
+#else
+static bool cpu_supports_p2pdma(void)
+{
+	return false;
+}
+#endif
+
 static const struct pci_p2pdma_whitelist_entry {
 	unsigned short vendor;
 	unsigned short device;
@@ -280,11 +298,6 @@ static const struct pci_p2pdma_whitelist_entry {
 		REQ_SAME_HOST_BRIDGE	= 1 << 0,
 	} flags;
 } pci_p2pdma_whitelist[] = {
-	/* AMD ZEN */
-	{PCI_VENDOR_ID_AMD,	0x1450,	0},
-	{PCI_VENDOR_ID_AMD,	0x15d0,	0},
-	{PCI_VENDOR_ID_AMD,	0x1630,	0},
-
 	/* Intel Xeon E5/Core i7 */
 	{PCI_VENDOR_ID_INTEL,	0x3c00, REQ_SAME_HOST_BRIDGE},
 	{PCI_VENDOR_ID_INTEL,	0x3c01, REQ_SAME_HOST_BRIDGE},
@@ -473,7 +486,8 @@ upstream_bridge_distance(struct pci_dev *provider, struct pci_dev *client,
 					      acs_redirects, acs_list);

 	if (map_type == PCI_P2PDMA_MAP_THRU_HOST_BRIDGE) {
-		if (!host_bridge_whitelist(provider, client))
+		if (!cpu_supports_p2pdma() &&
+		    !host_bridge_whitelist(provider, client))
 			map_type = PCI_P2PDMA_MAP_NOT_SUPPORTED;
 	}


base-commit: 92ed301919932f777713b9172e525674157e983d
--
2.20.1

             reply index

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-29 23:18 Logan Gunthorpe [this message]
2020-07-30  4:31 ` Alex Deucher
2020-07-30 15:27 ` Bjorn Helgaas

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