From: "Saheed O. Bolarinwa" <refactormyself@gmail.com>
To: helgaas@kernel.org, Mike Marciniszyn <mike.marciniszyn@intel.com>,
Dennis Dalessandro <dennis.dalessandro@intel.com>,
Doug Ledford <dledford@redhat.com>,
Jason Gunthorpe <jgg@ziepe.ca>
Cc: "Saheed O. Bolarinwa" <refactormyself@gmail.com>,
bjorn@helgaas.com, skhan@linuxfoundation.org,
linux-kernel-mentees@lists.linuxfoundation.org,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-rdma@vger.kernel.org
Subject: [PATCH v4 01/12] IB/hfi1: Check if pcie_capability_read_*() reads ~0
Date: Fri, 31 Jul 2020 13:02:29 +0200 [thread overview]
Message-ID: <20200731110240.98326-2-refactormyself@gmail.com> (raw)
In-Reply-To: <20200731110240.98326-1-refactormyself@gmail.com>
On failure pcie_capability_read_dword() sets it's last parameter,
val to 0. In this case dn and up will be 0, so aspm_hw_l1_supported()
will return false.
However, with Patch 12/12, it is possible that val is set to ~0 on
failure. This would introduce a bug because (x & x) == (~0 & x). So
with dn and up being 0x02, a true value is return when the read has
actually failed.
Since, the value ~0 is invalid here,
Reset dn and up to 0 when a value of ~0 is read into them, this
ensures false is returned on failure in this case.
Suggested-by: Bjorn Helgaas <bjorn@helgaas.com>
Signed-off-by: Saheed O. Bolarinwa <refactormyself@gmail.com>
---
drivers/infiniband/hw/hfi1/aspm.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/infiniband/hw/hfi1/aspm.c b/drivers/infiniband/hw/hfi1/aspm.c
index a3c53be4072c..9605b2145d19 100644
--- a/drivers/infiniband/hw/hfi1/aspm.c
+++ b/drivers/infiniband/hw/hfi1/aspm.c
@@ -33,13 +33,13 @@ static bool aspm_hw_l1_supported(struct hfi1_devdata *dd)
return false;
pcie_capability_read_dword(dd->pcidev, PCI_EXP_LNKCAP, &dn);
- dn = ASPM_L1_SUPPORTED(dn);
+ dn = (dn == (u32)~0) ? 0 : ASPM_L1_SUPPORTED(dn);
pcie_capability_read_dword(parent, PCI_EXP_LNKCAP, &up);
- up = ASPM_L1_SUPPORTED(up);
+ up = (up == (u32)~0) ? 0 : ASPM_L1_SUPPORTED(up);
/* ASPM works on A-step but is reported as not supported */
- return (!!dn || is_ax(dd)) && !!up;
+ return (dn || is_ax(dd)) && up;
}
/* Set L1 entrance latency for slower entry to L1 */
--
2.18.4
next prev parent reply other threads:[~2020-07-31 12:02 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-31 11:02 [PATCH v4 00/12] PCI: Remove '*val = 0' from pcie_capability_read_*() Saheed O. Bolarinwa
2020-07-31 11:02 ` Saheed O. Bolarinwa [this message]
2020-07-31 13:55 ` [PATCH v4 01/12] IB/hfi1: Check if pcie_capability_read_*() reads ~0 Bjorn Helgaas
2020-08-03 11:46 ` Ian Kumlien
2020-07-31 11:02 ` [PATCH v4 02/12] misc: rtsx: " Saheed O. Bolarinwa
2020-07-31 11:02 ` [PATCH v4 03/12] ath9k: " Saheed O. Bolarinwa
2020-07-31 11:02 ` [PATCH v4 04/12] iwlegacy: " Saheed O. Bolarinwa
2020-07-31 11:02 ` [PATCH v4 05/12] PCI: pciehp: Set "Power On" as the default get_power_status Saheed O. Bolarinwa
2020-07-31 11:02 ` [PATCH v4 06/12] PCI: pciehp: Check if pcie_capability_read_*() reads ~0 Saheed O. Bolarinwa
2020-07-31 11:02 ` [PATCH v4 07/12] PCI/ACPI: " Saheed O. Bolarinwa
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