From: Ming Qiao <mqiao@juniper.net>
To: bhelgaas@google.com, linux-pci@vger.kernel.org,
linux-kernel@vger.kernel.org
Cc: Ming Qiao <mqiao@juniper.net>, Debjit Ghosh <dghosh@juniper.net>,
Santhanakrishnan Balraj <sbalraj@juniper.net>,
Rajat Jain <rajatja@google.com>
Subject: [PATCH 2/3] PCI: Add quirks for Juniper ASICs to set class code
Date: Tue, 15 Sep 2020 08:11:02 -0700 [thread overview]
Message-ID: <20200915151103.7086-2-mqiao@juniper.net> (raw)
In-Reply-To: <20200915151103.7086-1-mqiao@juniper.net>
Some of the Juniper ASICs do not report correct PCI class ID, which
would confuse kernel APIs accessing the specific class of devices.
Change them to PCI_CLASS_NETWORK_OTHER << 8.
Signed-off-by: Debjit Ghosh <dghosh@juniper.net>
Signed-off-by: Santhanakrishnan Balraj <sbalraj@juniper.net>
Signed-off-by: Rajat Jain <rajatja@google.com>
Signed-off-by: Ming Qiao <mqiao@juniper.net>
---
drivers/pci/quirks.c | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 61344d2..04dd490 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -5657,3 +5657,22 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JUNIPER, 0x00A8, quirk_jnx_fpga);
DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JUNIPER, 0x00A9, quirk_jnx_fpga);
DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JUNIPER, 0x00AA, quirk_jnx_fpga);
DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_XILINX, 0x0505, quirk_jnx_fpga);
+
+/*
+ * PCI class reported by some Juniper ASICs is not correct.
+ * Change it to NETWORK.
+ */
+static void quirk_jnx_asic(struct pci_dev *dev)
+{
+ dev->class = PCI_CLASS_NETWORK_OTHER << 8;
+}
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JUNIPER, 0x003C, quirk_jnx_asic);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JUNIPER, 0x003D, quirk_jnx_asic);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JUNIPER, 0x003E, quirk_jnx_asic);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JUNIPER, 0x0055, quirk_jnx_asic);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JUNIPER, 0x005E, quirk_jnx_asic);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JUNIPER, 0x005F, quirk_jnx_asic);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JUNIPER, 0x008E, quirk_jnx_asic);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JUNIPER, 0x008D, quirk_jnx_asic);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JUNIPER, 0x0090, quirk_jnx_asic);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JUNIPER, 0x00B2, quirk_jnx_asic);
--
2.10.0
next prev parent reply other threads:[~2020-09-15 22:33 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-15 15:11 [PATCH 1/3] PCI: Add quirks for Juniper FPGAs to set class code Ming Qiao
2020-09-15 15:11 ` Ming Qiao [this message]
2020-09-15 15:11 ` [PATCH 3/3] PCI: Add quirks for Juniper ASICs to fix PCIe gen Ming Qiao
2020-09-15 20:36 ` [PATCH 1/3] PCI: Add quirks for Juniper FPGAs to set class code Bjorn Helgaas
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