From: Christoph Hellwig <hch@infradead.org>
To: Bjorn Helgaas <helgaas@kernel.org>
Cc: Nitesh Narayan Lal <nitesh@redhat.com>,
hch@infradead.org, linux-kernel@vger.kernel.org,
netdev@vger.kernel.org, linux-pci@vger.kernel.org,
intel-wired-lan@lists.osuosl.org, frederic@kernel.org,
mtosatti@redhat.com, sassmann@redhat.com,
jesse.brandeburg@intel.com, lihong.yang@intel.com,
jeffrey.t.kirsher@intel.com, jacob.e.keller@intel.com,
jlelli@redhat.com, bhelgaas@google.com,
mike.marciniszyn@intel.com, dennis.dalessandro@intel.com,
thomas.lendacky@amd.com, jiri@nvidia.com, mingo@redhat.com,
peterz@infradead.org, juri.lelli@redhat.com,
vincent.guittot@linaro.org, lgoncalv@redhat.com
Subject: Re: [PATCH v4 4/4] PCI: Limit pci_alloc_irq_vectors() to housekeeping CPUs
Date: Tue, 29 Sep 2020 18:46:54 +0100
Message-ID: <20200929174654.GA773@infradead.org> (raw)
In-Reply-To: <20200928215931.GA2499944@bjorn-Precision-5520>
On Mon, Sep 28, 2020 at 04:59:31PM -0500, Bjorn Helgaas wrote:
> [to: Christoph in case he has comments, since I think he wrote this code]
I think I actually suggested this a few iterations back.
> > + hk_cpus = housekeeping_num_online_cpus(HK_FLAG_MANAGED_IRQ);
> > +
> > + /*
> > + * If we have isolated CPUs for use by real-time tasks, to keep the
> > + * latency overhead to a minimum, device-specific IRQ vectors are moved
> > + * to the housekeeping CPUs from the userspace by changing their
> > + * affinity mask. Limit the vector usage to keep housekeeping CPUs from
> > + * running out of IRQ vectors.
> > + */
> > + if (hk_cpus < num_online_cpus()) {
I woukd have moved the assignment to hk_cpus below the comment and
just above the if, but that is really just a minor style preference.
Otherwise this looks good:
Acked-by: Christoph Hellwig <hch@lst.de>
next prev parent reply index
Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-28 18:35 [PATCH v4 0/4] isolation: limit msix vectors " Nitesh Narayan Lal
2020-09-28 18:35 ` [PATCH v4 1/4] sched/isolation: API to get number of " Nitesh Narayan Lal
2020-09-28 18:35 ` [PATCH v4 2/4] sched/isolation: Extend nohz_full to isolate managed IRQs Nitesh Narayan Lal
2020-10-23 13:25 ` Peter Zijlstra
2020-10-23 13:29 ` Frederic Weisbecker
2020-10-23 13:57 ` Nitesh Narayan Lal
2020-10-23 13:45 ` Nitesh Narayan Lal
2020-09-28 18:35 ` [PATCH v4 3/4] i40e: Limit msix vectors to housekeeping CPUs Nitesh Narayan Lal
2020-09-28 18:35 ` [PATCH v4 4/4] PCI: Limit pci_alloc_irq_vectors() " Nitesh Narayan Lal
2020-09-28 21:59 ` Bjorn Helgaas
2020-09-29 17:46 ` Christoph Hellwig [this message]
2020-10-16 12:20 ` Peter Zijlstra
2020-10-18 18:14 ` Nitesh Narayan Lal
2020-10-19 11:11 ` Peter Zijlstra
2020-10-19 14:00 ` Marcelo Tosatti
2020-10-19 14:25 ` Nitesh Narayan Lal
2020-10-20 7:30 ` Peter Zijlstra
2020-10-20 13:00 ` Nitesh Narayan Lal
2020-10-20 13:41 ` Peter Zijlstra
2020-10-20 14:39 ` Nitesh Narayan Lal
2020-10-22 17:47 ` Nitesh Narayan Lal
2020-10-23 8:58 ` Peter Zijlstra
2020-10-23 13:10 ` Nitesh Narayan Lal
2020-10-23 21:00 ` Thomas Gleixner
2020-10-26 13:35 ` Nitesh Narayan Lal
2020-10-26 13:57 ` Thomas Gleixner
2020-10-26 17:30 ` Marcelo Tosatti
2020-10-26 19:00 ` Thomas Gleixner
2020-10-26 19:11 ` Marcelo Tosatti
2020-10-26 19:21 ` Jacob Keller
2020-10-26 20:11 ` Thomas Gleixner
2020-10-26 21:11 ` Jacob Keller
2020-10-26 21:50 ` Thomas Gleixner
2020-10-26 22:13 ` Jakub Kicinski
2020-10-26 22:46 ` Thomas Gleixner
2020-10-26 22:52 ` Jacob Keller
2020-10-26 22:22 ` Nitesh Narayan Lal
2020-10-26 22:49 ` Thomas Gleixner
2020-10-26 23:08 ` Jacob Keller
2020-10-27 14:28 ` Thomas Gleixner
2020-10-27 11:47 ` Marcelo Tosatti
2020-10-27 14:43 ` Thomas Gleixner
2020-10-19 14:21 ` Frederic Weisbecker
2020-10-20 14:16 ` Thomas Gleixner
2020-10-20 16:18 ` Nitesh Narayan Lal
2020-10-20 18:07 ` Thomas Gleixner
2020-10-21 20:25 ` Thomas Gleixner
2020-10-21 21:04 ` Nitesh Narayan Lal
2020-10-22 0:02 ` Jakub Kicinski
2020-10-22 0:27 ` Jacob Keller
2020-10-22 8:28 ` Thomas Gleixner
2020-10-22 12:28 ` Marcelo Tosatti
2020-10-22 22:39 ` Thomas Gleixner
2020-10-01 15:49 ` [PATCH v4 0/4] isolation: limit msix vectors " Frederic Weisbecker
2020-10-08 21:40 ` Nitesh Narayan Lal
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