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Date:   Wed, 30 Sep 2020 19:38:57 -0300
From:   Jason Gunthorpe <jgg@nvidia.com>
To:     "Raj, Ashok" <ashok.raj@intel.com>
CC:     Thomas Gleixner <tglx@linutronix.de>,
        Dave Jiang <dave.jiang@intel.com>, <vkoul@kernel.org>,
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Subject: Re: [PATCH v3 05/18] dmaengine: idxd: add IMS support in base driver
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On Wed, Sep 30, 2020 at 02:49:41PM -0700, Raj, Ashok wrote:

> One of the parameters it has is the "supported system page-sizes" which is
> usually there in the SRIOV properties. So it needed a place holder for
> that. 

No idea why this would be a PCI cap. It is certainly not something so
universal it needs standardizing. There are many ways a device can
manage a BAR to match a required protection granularity.

> When we provision an entire PCI device that is IMS capable. The guest
> driver does know it can update the IMS entries directly without going to
> the host. But in order to do remapping we need something like how we manage
> PASID allocation from guest, so an IRTE entry can be allocated and the host
> driver can write the proper values for IMS.

Look at the architecture we ended up with.

You need to make pci_subdevice_msi_create_irq_domain() fail if the
platform can't provide the functionality.

Working around that with PCI caps is pretty gross.

Jason