From: Jian-Hong Pan <jhp@endlessos.org>
To: Jon Derrick <jonathan.derrick@intel.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Bjorn Helgaas <helgaas@kernel.org>
Cc: linux-pci@vger.kernel.org,
You-Sheng Yang <vicamo.yang@canonical.com>,
Keith Busch <kbusch@kernel.org>,
linux@endlessm.com, Jian-Hong Pan <jhp@endlessos.org>
Subject: Re: [PATCH] PCI: vmd: Add AHCI to fast interrupt list
Date: Mon, 19 Oct 2020 17:37:35 +0800 [thread overview]
Message-ID: <20201019093734.4091-1-jhp@endlessos.org> (raw)
In-Reply-To: <20200904171325.64959-1-jonathan.derrick@intel.com>
>On 2020-09-05 01:13, Jon Derrick wrote:
>> Some platforms have an AHCI controller behind VMD. These platforms are
>> working correctly except for a case when the AHCI MSI is programmed with
>> VMD IRQ vector 0 (0xfee00000). When programmed with any other interrupt
>> (0xfeeNN000), the MSI is routed correctly and is handled by VMD. Placing
>> the AHCI MSI(s) in the fast-interrupt allow list solves the issue.
>>
>> This also requires that VMD allocate more than one MSI/X vector and
>> changes the minimum MSI/X vectors allocated to two.
>>
>> Signed-off-by: Jon Derrick <jonathan.derrick@intel.com>
>
> Verified two platforms with such configuration. Thank you.
>
> You-Sheng Yang
We have some laptops equipped with Tiger Lake chips and such configuration that
hit the same issue, too. They all could be fixed by this patch. Thank you
Tested-by: Jian-Hong Pan <jhp@endlessos.org>
next prev parent reply other threads:[~2020-10-19 9:41 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-04 17:13 [PATCH] PCI: vmd: Add AHCI to fast interrupt list Jon Derrick
2020-09-08 7:15 ` You-Sheng Yang
2020-09-12 2:26 ` Keith Busch
2020-09-14 12:21 ` Derrick, Jonathan
2020-10-19 9:37 ` Jian-Hong Pan [this message]
2020-10-20 15:20 ` Keith Busch
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