From: Vidya Sagar <vidyas@nvidia.com> To: <jingoohan1@gmail.com>, <gustavo.pimentel@synopsys.com>, <lorenzo.pieralisi@arm.com>, <bhelgaas@google.com>, <amurray@thegoodpenguin.co.uk>, <robh@kernel.org>, <treding@nvidia.com>, <jonathanh@nvidia.com> Cc: <linux-pci@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <kthota@nvidia.com>, <mmaddireddy@nvidia.com>, <vidyas@nvidia.com>, <sagar.tv@gmail.com> Subject: [PATCH 1/2] PCI/AER: Add pcie_is_ecrc_enabled() API Date: Sun, 25 Oct 2020 13:01:12 +0530 Message-ID: <20201025073113.31291-2-vidyas@nvidia.com> (raw) In-Reply-To: <20201025073113.31291-1-vidyas@nvidia.com> Adds pcie_is_ecrc_enabled() API to let other sub-systems (like DesignWare) to query if ECRC policy is enabled and perform any configuration required in those respective sub-systems. Signed-off-by: Vidya Sagar <vidyas@nvidia.com> --- drivers/pci/pci.h | 2 ++ drivers/pci/pcie/aer.c | 11 +++++++++++ 2 files changed, 13 insertions(+) diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index fa12f7cbc1a0..325fdbf91dde 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -575,9 +575,11 @@ static inline void pcie_aspm_powersave_config_link(struct pci_dev *pdev) { } #ifdef CONFIG_PCIE_ECRC void pcie_set_ecrc_checking(struct pci_dev *dev); void pcie_ecrc_get_policy(char *str); +bool pcie_is_ecrc_enabled(void); #else static inline void pcie_set_ecrc_checking(struct pci_dev *dev) { } static inline void pcie_ecrc_get_policy(char *str) { } +static inline bool pcie_is_ecrc_enabled(void) { return false; } #endif #ifdef CONFIG_PCIE_PTM diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c index 65dff5f3457a..24363c895aba 100644 --- a/drivers/pci/pcie/aer.c +++ b/drivers/pci/pcie/aer.c @@ -207,6 +207,17 @@ void pcie_ecrc_get_policy(char *str) ecrc_policy = i; } + +/** + * pcie_is_ecrc_enabled - returns if ECRC is enabled in the system or not + * + * Returns 1 if ECRC policy is enabled and 0 otherwise + */ +bool pcie_is_ecrc_enabled(void) +{ + return ecrc_policy == ECRC_POLICY_ON; +} +EXPORT_SYMBOL(pcie_is_ecrc_enabled); #endif /* CONFIG_PCIE_ECRC */ #define PCI_EXP_AER_FLAGS (PCI_EXP_DEVCTL_CERE | PCI_EXP_DEVCTL_NFERE | \ -- 2.17.1
next prev parent reply index Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-10-25 7:31 [PATCH 0/2] Add support to configure DWC for ECRC Vidya Sagar 2020-10-25 7:31 ` Vidya Sagar [this message] 2020-10-25 7:31 ` [PATCH 2/2] PCI: dwc: Add support to configure " Vidya Sagar 2020-10-25 20:49 ` Jingoo Han 2020-10-26 6:59 ` Vidya Sagar 2020-10-26 13:30 ` Jingoo Han
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