From: Zhiqiang Hou <Zhiqiang.Hou@nxp.com>
To: linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, bhelgaas@google.com,
robh+dt@kernel.org, lorenzo.pieralisi@arm.com
Cc: minghuan.Lian@nxp.com, mingkai.hu@nxp.com, roy.zang@nxp.com,
Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Subject: [PATCH 1/2] dt-bindings: pci: layerscape-pci: Add compatible strings for LX2160A rev2
Date: Mon, 26 Oct 2020 13:14:47 +0800 [thread overview]
Message-ID: <20201026051448.1913-1-Zhiqiang.Hou@nxp.com> (raw)
From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Add PCIe Endpoint mode compatible string "fsl,lx2160ar2-pcie-ep"
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
Documentation/devicetree/bindings/pci/layerscape-pci.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/pci/layerscape-pci.txt b/Documentation/devicetree/bindings/pci/layerscape-pci.txt
index daa99f7d4c3f..6d898dd4a8e2 100644
--- a/Documentation/devicetree/bindings/pci/layerscape-pci.txt
+++ b/Documentation/devicetree/bindings/pci/layerscape-pci.txt
@@ -26,6 +26,7 @@ Required properties:
"fsl,ls1046a-pcie-ep", "fsl,ls-pcie-ep"
"fsl,ls1088a-pcie-ep", "fsl,ls-pcie-ep"
"fsl,ls2088a-pcie-ep", "fsl,ls-pcie-ep"
+ "fsl,lx2160ar2-pcie-ep", "fsl,ls-pcie-ep"
- reg: base addresses and lengths of the PCIe controller register blocks.
- interrupts: A list of interrupt outputs of the controller. Must contain an
entry for each entry in the interrupt-names property.
--
2.17.1
next reply other threads:[~2020-10-26 5:24 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-26 5:14 Zhiqiang Hou [this message]
2020-10-26 5:14 ` [PATCH 2/2] PCI: layerscape: Add EP mode support for LX2160A rev2 Zhiqiang Hou
2020-10-30 18:31 ` [PATCH 1/2] dt-bindings: pci: layerscape-pci: Add compatible strings " Rob Herring
2021-01-18 15:19 ` Lorenzo Pieralisi
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