From: Rob Herring <robh@kernel.org>
To: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Cc: bhelgaas@google.com, marek.vasut+renesas@gmail.com,
prabhakar.mahadev-lad.rj@bp.renesas.com,
linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
linux-renesas-soc@vger.kernel.org
Subject: Re: [PATCH 1/3] dt-bindings: pci: rcar-pci-host: convert bindings to json-schema
Date: Wed, 28 Oct 2020 09:48:58 -0500 [thread overview]
Message-ID: <20201028144858.GB3994930@bogus> (raw)
In-Reply-To: <1603850751-32762-2-git-send-email-yoshihiro.shimoda.uh@renesas.com>
On Wed, Oct 28, 2020 at 11:05:49AM +0900, Yoshihiro Shimoda wrote:
> Convert Renesas PCIe Host controller bindings documentation to
> json-schema. Note that some compatible doesn't contain on
> the original documantation so that incremental patches are required
> for it.
>
> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> ---
> .../devicetree/bindings/pci/rcar-pci-host.yaml | 146 +++++++++++++++++++++
> Documentation/devicetree/bindings/pci/rcar-pci.txt | 72 ----------
> 2 files changed, 146 insertions(+), 72 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/pci/rcar-pci-host.yaml
> delete mode 100644 Documentation/devicetree/bindings/pci/rcar-pci.txt
>
> diff --git a/Documentation/devicetree/bindings/pci/rcar-pci-host.yaml b/Documentation/devicetree/bindings/pci/rcar-pci-host.yaml
> new file mode 100644
> index 0000000..d286454
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pci/rcar-pci-host.yaml
> @@ -0,0 +1,146 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +# Copyright (C) 2020 Renesas Electronics Corp.
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/pci/rcar-pci-host.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Renesas R-Car PCIe Host
> +
> +maintainers:
> + - Marek Vasut <marek.vasut+renesas@gmail.com>
> + - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
allOf:
- $ref: pci-bus.yaml#
> +
> +properties:
> + compatible:
> + oneOf:
> + - items:
> + - enum:
> + - renesas,pcie-r8a7742 # RZ/G1H
> + - renesas,pcie-r8a7743 # RZ/G1M
> + - renesas,pcie-r8a7744 # RZ/G1N
> + - renesas,pcie-r8a7790 # R-Car H2
> + - renesas,pcie-r8a7791 # R-Car M2-W
> + - renesas,pcie-r8a7793 # R-Car M2-N
> + - const: renesas,pcie-rcar-gen2 # R-Car Gen2 and RZ/G1
> + - items:
> + - enum:
> + - renesas,pcie-r8a774a1 # RZ/G2M
> + - renesas,pcie-r8a774b1 # RZ/G2N
> + - renesas,pcie-r8a774c0 # RZ/G2E
> + - renesas,pcie-r8a7795 # R-Car H3
> + - renesas,pcie-r8a7796 # R-Car M3-W
> + - renesas,pcie-r8a77961 # R-Car M3-W+
> + - renesas,pcie-r8a77980 # R-Car V3H
> + - renesas,pcie-r8a77990 # R-Car E3
> + - const: renesas,pcie-rcar-gen3 # R-Car Gen3 and RZ/G2
> +
> + reg:
> + maxItems: 1
> +
> + '#address-cells':
> + const: 3
> +
> + '#size-cells':
> + const: 2
No need to define these here as pci-bus.yaml does.
> +
> + bus-range: true
> +
> + device_type:
> + const: pci
Same here.
> +
> + ranges:
> + minItems: 4
> + maxItems: 4
> +
> + dma-ranges:
> + minItems: 1
> + maxItems: 2
> +
> + interrupts:
> + minItems: 3
> + maxItems: 3
> +
> + '#interrupt-cells':
> + const: 1
And this.
> +
> + interrupt-map-mask: true
> +
> + interrupt-map: true
> +
> + clocks:
> + maxItems: 2
> +
> + clock-names:
> + items:
> + - const: pcie
> + - const: pcie_bus
> +
> + power-domains:
> + maxItems: 1
> +
> + resets:
> + maxItems: 1
> +
> + phys:
> + maxItems: 1
> +
> + phy-names:
> + const: pcie
> +
> +required:
> + - compatible
> + - reg
> + - '#address-cells'
> + - '#size-cells'
Already required by pci-bus.yaml
> + - bus-range
This generally shouldn't be required if 0-255 is supported.
> + - device_type
> + - ranges
Both already required by pci-bus.yaml
> + - dma-ranges
> + - interrupts
> + - '#interrupt-cells'
> + - interrupt-map-mask
> + - interrupt-map
And these.
> + - clocks
> + - clock-names
> + - power-domains
> + - resets
> +
> +additionalProperties: false
Use unevaluatedProperties instead.
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/r8a7791-cpg-mssr.h>
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include <dt-bindings/power/r8a7791-sysc.h>
> +
> + soc {
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + pcie: pcie@fe000000 {
> + compatible = "renesas,pcie-r8a7791", "renesas,pcie-rcar-gen2";
> + reg = <0 0xfe000000 0 0x80000>;
> + #address-cells = <3>;
> + #size-cells = <2>;
> + bus-range = <0x00 0xff>;
> + device_type = "pci";
> + ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
> + <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
> + <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
> + <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
> + dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>,
> + <0x42000000 2 0x00000000 2 0x00000000 0 0x40000000>;
> + interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
> + #interrupt-cells = <1>;
> + interrupt-map-mask = <0 0 0 0>;
> + interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
> + clock-names = "pcie", "pcie_bus";
> + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
> + resets = <&cpg 319>;
> + status = "disabled";
Don't show status in examples.
> + };
> + };
> diff --git a/Documentation/devicetree/bindings/pci/rcar-pci.txt b/Documentation/devicetree/bindings/pci/rcar-pci.txt
> deleted file mode 100644
> index 14d307d..0000000
> --- a/Documentation/devicetree/bindings/pci/rcar-pci.txt
> +++ /dev/null
> @@ -1,72 +0,0 @@
> -* Renesas R-Car PCIe interface
> -
> -Required properties:
> -compatible: "renesas,pcie-r8a7742" for the R8A7742 SoC;
> - "renesas,pcie-r8a7743" for the R8A7743 SoC;
> - "renesas,pcie-r8a7744" for the R8A7744 SoC;
> - "renesas,pcie-r8a774a1" for the R8A774A1 SoC;
> - "renesas,pcie-r8a774b1" for the R8A774B1 SoC;
> - "renesas,pcie-r8a774c0" for the R8A774C0 SoC;
> - "renesas,pcie-r8a7779" for the R8A7779 SoC;
> - "renesas,pcie-r8a7790" for the R8A7790 SoC;
> - "renesas,pcie-r8a7791" for the R8A7791 SoC;
> - "renesas,pcie-r8a7793" for the R8A7793 SoC;
> - "renesas,pcie-r8a7795" for the R8A7795 SoC;
> - "renesas,pcie-r8a7796" for the R8A77960 SoC;
> - "renesas,pcie-r8a77961" for the R8A77961 SoC;
> - "renesas,pcie-r8a77980" for the R8A77980 SoC;
> - "renesas,pcie-r8a77990" for the R8A77990 SoC;
> - "renesas,pcie-rcar-gen2" for a generic R-Car Gen2 or
> - RZ/G1 compatible device.
> - "renesas,pcie-rcar-gen3" for a generic R-Car Gen3 or
> - RZ/G2 compatible device.
> -
> - When compatible with the generic version, nodes must list the
> - SoC-specific version corresponding to the platform first
> - followed by the generic version.
> -
> -- reg: base address and length of the PCIe controller registers.
> -- #address-cells: set to <3>
> -- #size-cells: set to <2>
> -- bus-range: PCI bus numbers covered
> -- device_type: set to "pci"
> -- ranges: ranges for the PCI memory and I/O regions.
> -- dma-ranges: ranges for the inbound memory regions.
> -- interrupts: two interrupt sources for MSI interrupts, followed by interrupt
> - source for hardware related interrupts (e.g. link speed change).
> -- #interrupt-cells: set to <1>
> -- interrupt-map-mask and interrupt-map: standard PCI properties
> - to define the mapping of the PCIe interface to interrupt numbers.
> -- clocks: from common clock binding: clock specifiers for the PCIe controller
> - and PCIe bus clocks.
> -- clock-names: from common clock binding: should be "pcie" and "pcie_bus".
> -
> -Optional properties:
> -- phys: from common PHY binding: PHY phandle and specifier (only make sense
> - for R-Car gen3 SoCs where the PCIe PHYs have their own register blocks).
> -- phy-names: from common PHY binding: should be "pcie".
> -
> -Example:
> -
> -SoC-specific DT Entry:
> -
> - pcie: pcie@fe000000 {
> - compatible = "renesas,pcie-r8a7791", "renesas,pcie-rcar-gen2";
> - reg = <0 0xfe000000 0 0x80000>;
> - #address-cells = <3>;
> - #size-cells = <2>;
> - bus-range = <0x00 0xff>;
> - device_type = "pci";
> - ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
> - 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
> - 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
> - 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
> - dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000
> - 0x42000000 2 0x00000000 2 0x00000000 0 0x40000000>;
> - interrupts = <0 116 4>, <0 117 4>, <0 118 4>;
> - #interrupt-cells = <1>;
> - interrupt-map-mask = <0 0 0 0>;
> - interrupt-map = <0 0 0 0 &gic 0 116 4>;
> - clocks = <&mstp3_clks R8A7791_CLK_PCIE>, <&pcie_bus_clk>;
> - clock-names = "pcie", "pcie_bus";
> - };
> --
> 2.7.4
>
next prev parent reply other threads:[~2020-10-29 2:44 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-28 2:05 [PATCH 0/3] dt-bindings: pci: rcar-pci-host: convert bindings to json-schema Yoshihiro Shimoda
2020-10-28 2:05 ` [PATCH 1/3] " Yoshihiro Shimoda
2020-10-28 14:44 ` Rob Herring
2020-10-30 4:46 ` Yoshihiro Shimoda
2020-10-28 14:48 ` Rob Herring [this message]
2020-10-30 5:04 ` Yoshihiro Shimoda
2020-10-28 2:05 ` [PATCH 2/3] dt-bindings: pci: rcar-pci-host: document r8a77965 bindings Yoshihiro Shimoda
2020-10-29 13:48 ` Geert Uytterhoeven
2020-10-28 2:05 ` [PATCH 3/3] dt-bindings: pci: rcar-pci: Add device tree support for r8a774e1 Yoshihiro Shimoda
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