From: Kishon Vijay Abraham I <kishon@ti.com>
To: Lee Jones <lee.jones@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Bjorn Helgaas <bhelgaas@google.com>,
Tero Kristo <t-kristo@ti.com>, Nishanth Menon <nm@ti.com>
Cc: Roger Quadros <rogerq@ti.com>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <linux-pci@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>
Subject: [PATCH 8/8] arm64: dts: ti: k3-j721e-main: Fix PCIe maximum outbound regions
Date: Mon, 2 Nov 2020 15:41:54 +0530 [thread overview]
Message-ID: <20201102101154.13598-9-kishon@ti.com> (raw)
In-Reply-To: <20201102101154.13598-1-kishon@ti.com>
PCIe controller in J721E supports a maximum of 32 outbound regions.
commit 4e5833884f66 ("arm64: dts: ti: k3-j721e-main: Add PCIe device tree
nodes") incorrectly added maximum number of outbound regions to 16. Fix
it here.
Fixes: 4e5833884f66 ("arm64: dts: ti: k3-j721e-main: Add PCIe device tree nodes")
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
index e2a96b2c423c..61b533130ed1 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
@@ -652,7 +652,7 @@
power-domains = <&k3_pds 239 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 239 1>;
clock-names = "fck";
- cdns,max-outbound-regions = <16>;
+ cdns,max-outbound-regions = <32>;
max-functions = /bits/ 8 <6>;
max-virtual-functions = /bits/ 16 <4 4 4 4 0 0>;
dma-coherent;
@@ -701,7 +701,7 @@
power-domains = <&k3_pds 240 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 240 1>;
clock-names = "fck";
- cdns,max-outbound-regions = <16>;
+ cdns,max-outbound-regions = <32>;
max-functions = /bits/ 8 <6>;
max-virtual-functions = /bits/ 16 <4 4 4 4 0 0>;
dma-coherent;
@@ -750,7 +750,7 @@
power-domains = <&k3_pds 241 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 241 1>;
clock-names = "fck";
- cdns,max-outbound-regions = <16>;
+ cdns,max-outbound-regions = <32>;
max-functions = /bits/ 8 <6>;
max-virtual-functions = /bits/ 16 <4 4 4 4 0 0>;
dma-coherent;
@@ -799,7 +799,7 @@
power-domains = <&k3_pds 242 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 242 1>;
clock-names = "fck";
- cdns,max-outbound-regions = <16>;
+ cdns,max-outbound-regions = <32>;
max-functions = /bits/ 8 <6>;
max-virtual-functions = /bits/ 16 <4 4 4 4 0 0>;
dma-coherent;
--
2.17.1
next prev parent reply other threads:[~2020-11-02 10:12 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-02 10:11 [PATCH 0/8] J7200: Add PCIe DT nodes to Enable PCIe Kishon Vijay Abraham I
2020-11-02 10:11 ` [PATCH 1/8] dt-bindings: mfd: ti,j721e-system-controller.yaml: Document "pcie-ctrl" Kishon Vijay Abraham I
2020-11-05 16:54 ` Rob Herring
2020-11-09 14:17 ` Kishon Vijay Abraham I
2020-11-02 10:11 ` [PATCH 2/8] dt-bindings: PCI: Add host mode dt-bindings for TI's J7200 SoC Kishon Vijay Abraham I
2020-11-05 16:56 ` Rob Herring
2020-11-02 10:11 ` [PATCH 3/8] dt-bindings: PCI: Add EP " Kishon Vijay Abraham I
2020-11-05 16:56 ` Rob Herring
2020-11-02 10:11 ` [PATCH 4/8] arm64: dts: ti: k3-j7200-main: Add DT for WIZ and SERDES Kishon Vijay Abraham I
2020-11-02 10:11 ` [PATCH 5/8] arm64: dts: ti: k3-j7200-main: Add PCIe device tree node Kishon Vijay Abraham I
2020-11-02 10:11 ` [PATCH 6/8] arm64: dts: ti: k3-j7200-common-proc-board: Enable SERDES0 Kishon Vijay Abraham I
2020-11-02 10:11 ` [PATCH 7/8] arm64: dts: ti: k3-j7200-common-proc-board: Enable PCIe Kishon Vijay Abraham I
2020-11-02 10:11 ` Kishon Vijay Abraham I [this message]
2020-11-02 16:41 ` [PATCH 8/8] arm64: dts: ti: k3-j721e-main: Fix PCIe maximum outbound regions Nishanth Menon
2020-11-03 2:18 ` Kishon Vijay Abraham I
2020-11-05 16:53 ` Rob Herring
2020-11-06 15:10 ` Kishon Vijay Abraham I
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