From: "Raj, Ashok" <ashok.raj@intel.com>
To: Jason Gunthorpe <jgg@nvidia.com>
Cc: Dan Williams <dan.j.williams@intel.com>,
"Tian, Kevin" <kevin.tian@intel.com>,
"Jiang, Dave" <dave.jiang@intel.com>,
Bjorn Helgaas <helgaas@kernel.org>,
"vkoul@kernel.org" <vkoul@kernel.org>,
"Dey, Megha" <megha.dey@intel.com>,
"maz@kernel.org" <maz@kernel.org>,
"bhelgaas@google.com" <bhelgaas@google.com>,
"tglx@linutronix.de" <tglx@linutronix.de>,
"alex.williamson@redhat.com" <alex.williamson@redhat.com>,
"Pan, Jacob jun" <jacob.jun.pan@intel.com>,
"Liu, Yi L" <yi.l.liu@intel.com>,
"Lu, Baolu" <baolu.lu@intel.com>,
"Kumar, Sanjay K" <sanjay.k.kumar@intel.com>,
"Luck, Tony" <tony.luck@intel.com>,
"kwankhede@nvidia.com" <kwankhede@nvidia.com>,
"eric.auger@redhat.com" <eric.auger@redhat.com>,
"parav@mellanox.com" <parav@mellanox.com>,
"rafael@kernel.org" <rafael@kernel.org>,
"netanelg@mellanox.com" <netanelg@mellanox.com>,
"shahafs@mellanox.com" <shahafs@mellanox.com>,
"yan.y.zhao@linux.intel.com" <yan.y.zhao@linux.intel.com>,
"pbonzini@redhat.com" <pbonzini@redhat.com>,
"Ortiz, Samuel" <samuel.ortiz@intel.com>,
"Hossain, Mona" <mona.hossain@intel.com>,
"dmaengine@vger.kernel.org" <dmaengine@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
Ashok Raj <ashok.raj@intel.com>
Subject: Re: [PATCH v4 06/17] PCI: add SIOV and IMS capability detection
Date: Sun, 8 Nov 2020 16:05:50 -0800 [thread overview]
Message-ID: <20201109000550.GD32074@araj-mobl1.jf.intel.com> (raw)
In-Reply-To: <20201108234142.GD2620339@nvidia.com>
Hi Jason
On Sun, Nov 08, 2020 at 07:41:42PM -0400, Jason Gunthorpe wrote:
> On Sun, Nov 08, 2020 at 10:11:24AM -0800, Raj, Ashok wrote:
>
> > > On (kvm) virtualization the addr/data pair the IRQ domain hands out
> > > doesn't work. It is some fake thing.
> >
> > Is it really some fake thing? I thought the vCPU and vector are real
> > for a guest, and VMM ensures when interrupts are delivered they are either.
>
> It is fake in the sense it is programmed into no hardware.
>
> It is real in the sense it is an ABI contract with the VMM.
Ah.. its clear now. That clears up my question below as well.
>
> Yes, no matter what the VMM has to know the guest wants an interrupt
> routed in and setup the VMM part of the equation. With SRIOV this is
> all done with the MSI trapping.
>
> > What if the guest creates some addr in the 0xfee... range how do we
> > take care of interrupt remapping and such without any VMM assist?
>
> Not sure I understand this?
>
My question was based on mis-conception that interrupt entries are directly
written by guest OS for mlx*. My concern was about security isolation if guest OS
has full control of device interrupt store.
I think you clarified it, that interrupts still are marshalled by the VMM
and not in direct control of guest OS. That makes my question moot.
Cheers,
Ashok
next prev parent reply other threads:[~2020-11-09 0:05 UTC|newest]
Thread overview: 125+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-30 18:50 [PATCH v4 00/17] Add VFIO mediated device support and DEV-MSI support for the idxd driver Dave Jiang
2020-10-30 18:50 ` [PATCH v4 01/17] irqchip: Add IMS (Interrupt Message Store) driver Dave Jiang
2020-10-30 22:01 ` Thomas Gleixner
2020-10-30 18:51 ` [PATCH v4 02/17] iommu/vt-d: Add DEV-MSI support Dave Jiang
2020-10-30 20:31 ` Thomas Gleixner
2020-10-30 20:52 ` Dave Jiang
2020-10-30 18:51 ` [PATCH v4 03/17] dmaengine: idxd: add theory of operation documentation for idxd mdev Dave Jiang
2020-10-30 18:51 ` [PATCH v4 04/17] dmaengine: idxd: add support for readonly config devices Dave Jiang
2020-10-30 18:51 ` [PATCH v4 05/17] dmaengine: idxd: add interrupt handle request support Dave Jiang
2020-10-30 18:51 ` [PATCH v4 06/17] PCI: add SIOV and IMS capability detection Dave Jiang
2020-10-30 19:51 ` Bjorn Helgaas
2020-10-30 21:20 ` Dave Jiang
2020-10-30 21:50 ` Bjorn Helgaas
2020-10-30 22:45 ` Jason Gunthorpe
2020-10-30 22:49 ` Dave Jiang
2020-11-02 13:21 ` Jason Gunthorpe
2020-11-03 2:49 ` Tian, Kevin
2020-11-03 12:43 ` Jason Gunthorpe
2020-11-04 3:41 ` Tian, Kevin
2020-11-04 12:40 ` Jason Gunthorpe
2020-11-04 13:34 ` Tian, Kevin
2020-11-04 13:54 ` Jason Gunthorpe
2020-11-06 9:48 ` Tian, Kevin
2020-11-06 13:14 ` Jason Gunthorpe
2020-11-06 16:48 ` Raj, Ashok
2020-11-06 17:51 ` Jason Gunthorpe
2020-11-06 23:47 ` Dan Williams
2020-11-07 0:12 ` Jason Gunthorpe
2020-11-07 1:42 ` Dan Williams
2020-11-08 18:11 ` Raj, Ashok
2020-11-08 18:34 ` David Woodhouse
2020-11-08 23:25 ` Raj, Ashok
2020-11-10 14:19 ` Raj, Ashok
2020-11-10 14:41 ` David Woodhouse
2020-11-08 23:41 ` Jason Gunthorpe
2020-11-09 0:05 ` Raj, Ashok [this message]
2020-11-08 18:47 ` Thomas Gleixner
2020-11-08 19:36 ` David Woodhouse
2020-11-08 22:47 ` Thomas Gleixner
2020-11-08 23:29 ` Jason Gunthorpe
2020-11-11 15:41 ` Christoph Hellwig
2020-11-11 16:09 ` Raj, Ashok
2020-11-11 22:27 ` Thomas Gleixner
2020-11-11 23:03 ` Raj, Ashok
2020-11-12 1:13 ` Thomas Gleixner
2020-11-12 13:10 ` Jason Gunthorpe
2020-11-08 23:23 ` Jason Gunthorpe
2020-11-08 23:36 ` Raj, Ashok
2020-11-09 7:37 ` Tian, Kevin
2020-11-09 16:46 ` Jason Gunthorpe
2020-11-08 23:58 ` Raj, Ashok
2020-11-09 7:59 ` Tian, Kevin
2020-11-09 11:21 ` Thomas Gleixner
2020-11-09 17:30 ` Jason Gunthorpe
2020-11-09 22:40 ` Raj, Ashok
2020-11-09 22:42 ` Thomas Gleixner
2020-11-10 5:14 ` Raj, Ashok
2020-11-10 10:27 ` Thomas Gleixner
2020-11-10 14:13 ` Raj, Ashok
2020-11-10 14:23 ` Jason Gunthorpe
2020-11-11 2:17 ` Tian, Kevin
2020-11-12 13:46 ` Jason Gunthorpe
2020-11-11 7:14 ` Tian, Kevin
2020-11-12 19:32 ` Konrad Rzeszutek Wilk
2020-11-12 22:42 ` Thomas Gleixner
2020-11-13 2:42 ` Tian, Kevin
2020-11-13 12:57 ` Jason Gunthorpe
2020-11-13 13:32 ` Thomas Gleixner
2020-11-13 16:12 ` Luck, Tony
2020-11-13 17:38 ` Raj, Ashok
2020-11-14 10:34 ` Christoph Hellwig
2020-11-14 21:18 ` Raj, Ashok
2020-11-15 11:26 ` Thomas Gleixner
2020-11-15 19:31 ` Raj, Ashok
2020-11-15 22:11 ` Thomas Gleixner
2020-11-16 0:22 ` Raj, Ashok
2020-11-16 7:31 ` Tian, Kevin
2020-11-16 15:46 ` Jason Gunthorpe
2020-11-16 17:56 ` Thomas Gleixner
2020-11-16 18:02 ` Jason Gunthorpe
2020-11-16 20:37 ` Thomas Gleixner
2020-11-16 23:51 ` Tian, Kevin
2020-11-17 9:21 ` Thomas Gleixner
2020-11-16 8:25 ` Christoph Hellwig
2020-11-10 14:19 ` Jason Gunthorpe
2020-11-11 2:35 ` Tian, Kevin
2020-11-08 21:18 ` Thomas Gleixner
2020-11-08 22:09 ` David Woodhouse
2020-11-08 22:52 ` Thomas Gleixner
2020-11-07 0:32 ` Thomas Gleixner
2020-11-09 5:25 ` Tian, Kevin
2020-10-30 18:51 ` [PATCH v4 07/17] dmaengine: idxd: add IMS support in base driver Dave Jiang
2020-10-30 18:51 ` [PATCH v4 08/17] dmaengine: idxd: add device support functions in prep for mdev Dave Jiang
2020-10-30 18:51 ` [PATCH v4 09/17] dmaengine: idxd: add basic mdev registration and helper functions Dave Jiang
2020-10-30 18:51 ` [PATCH v4 10/17] dmaengine: idxd: add emulation rw routines Dave Jiang
2020-10-30 18:52 ` [PATCH v4 11/17] dmaengine: idxd: prep for virtual device commands Dave Jiang
2020-10-30 18:52 ` [PATCH v4 12/17] dmaengine: idxd: virtual device commands emulation Dave Jiang
2020-10-30 18:52 ` [PATCH v4 13/17] dmaengine: idxd: ims setup for the vdcm Dave Jiang
2020-10-30 21:26 ` Thomas Gleixner
2020-10-30 18:52 ` [PATCH v4 14/17] dmaengine: idxd: add mdev type as a new wq type Dave Jiang
2020-10-30 18:52 ` [PATCH v4 15/17] dmaengine: idxd: add dedicated wq mdev type Dave Jiang
2020-10-30 18:52 ` [PATCH v4 16/17] dmaengine: idxd: add new wq state for mdev Dave Jiang
2020-10-30 18:52 ` [PATCH v4 17/17] dmaengine: idxd: add error notification from host driver to mediated device Dave Jiang
2020-10-30 18:58 ` [PATCH v4 00/17] Add VFIO mediated device support and DEV-MSI support for the idxd driver Jason Gunthorpe
2020-10-30 19:13 ` Dave Jiang
2020-10-30 19:17 ` Jason Gunthorpe
2020-10-30 19:23 ` Raj, Ashok
2020-10-30 19:30 ` Jason Gunthorpe
2020-10-30 20:43 ` Raj, Ashok
2020-10-30 22:54 ` Jason Gunthorpe
2020-10-31 2:50 ` Thomas Gleixner
2020-10-31 23:53 ` Raj, Ashok
2020-11-02 13:20 ` Jason Gunthorpe
2020-11-02 16:20 ` Raj, Ashok
2020-11-02 17:19 ` Jason Gunthorpe
2020-11-02 18:18 ` Dave Jiang
2020-11-02 18:26 ` Jason Gunthorpe
2020-11-02 18:38 ` Dan Williams
2020-11-02 18:51 ` Jason Gunthorpe
2020-11-02 19:26 ` Dan Williams
2020-10-30 20:48 ` Thomas Gleixner
2020-10-30 20:59 ` Dave Jiang
2020-10-30 22:10 ` Thomas Gleixner
[not found] <draft-875z6ekcj5.fsf@nanos.tec.linutronix.de>
2020-11-09 14:08 ` [PATCH v4 06/17] PCI: add SIOV and IMS capability detection Thomas Gleixner
2020-11-09 18:10 ` Raj, Ashok
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