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From: Vidya Sagar <vidyas@nvidia.com>
To: <lorenzo.pieralisi@arm.com>, <robh+dt@kernel.org>,
	<bhelgaas@google.com>, <thierry.reding@gmail.com>,
	<jonathanh@nvidia.com>, <amanharitsh123@gmail.com>,
	<dinghao.liu@zju.edu.cn>, <kw@linux.com>
Cc: <linux-pci@vger.kernel.org>, <linux-tegra@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, <kthota@nvidia.com>,
	<mmaddireddy@nvidia.com>, <vidyas@nvidia.com>,
	<sagar.tv@gmail.com>
Subject: [PATCH V4 5/6] PCI: tegra: Check return value of tegra_pcie_init_controller()
Date: Mon, 9 Nov 2020 22:49:36 +0530	[thread overview]
Message-ID: <20201109171937.28326-6-vidyas@nvidia.com> (raw)
In-Reply-To: <20201109171937.28326-1-vidyas@nvidia.com>

The return value of tegra_pcie_init_controller() must be checked before
PCIe link up check and registering debugfs entries subsequently as it
doesn't make sense to do these when the controller initialization itself
has failed.

Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
---
V4:
* None

V3:
* New patch in this series

 drivers/pci/controller/dwc/pcie-tegra194.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
index 9be10c8953df..8c08998b9ce1 100644
--- a/drivers/pci/controller/dwc/pcie-tegra194.c
+++ b/drivers/pci/controller/dwc/pcie-tegra194.c
@@ -1579,7 +1579,11 @@ static int tegra_pcie_config_rp(struct tegra_pcie_dw *pcie)
 		goto fail_pm_get_sync;
 	}
 
-	tegra_pcie_init_controller(pcie);
+	ret = tegra_pcie_init_controller(pcie);
+	if (ret < 0) {
+		dev_err(dev, "Failed to initialize controller: %d\n", ret);
+		goto fail_pm_get_sync;
+	}
 
 	pcie->link_state = tegra_pcie_dw_link_up(&pcie->pci);
 	if (!pcie->link_state) {
-- 
2.17.1


  parent reply	other threads:[~2020-11-09 17:20 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-09 17:19 [PATCH V4 0/6] Enhancements to Tegra194 PCIe driver Vidya Sagar
2020-11-09 17:19 ` [PATCH V4 1/6] PCI: tegra: Fix ASPM-L1SS advertisement disable code Vidya Sagar
2020-11-26 11:33   ` Thierry Reding
2020-12-03 12:36     ` Vidya Sagar
2020-11-09 17:19 ` [PATCH V4 2/6] PCI: tegra: Map configuration space as nGnRnE Vidya Sagar
2020-11-26 11:33   ` Thierry Reding
2020-12-03 12:56     ` Vidya Sagar
2020-11-09 17:19 ` [PATCH V4 3/6] PCI: tegra: Set DesignWare IP version Vidya Sagar
2020-11-26 11:34   ` Thierry Reding
2020-11-09 17:19 ` [PATCH V4 4/6] PCI: tegra: Continue unconfig sequence even if parts fail Vidya Sagar
2020-11-26 11:34   ` Thierry Reding
2020-11-30 12:10   ` Lorenzo Pieralisi
2020-12-01 14:24     ` Thierry Reding
2020-12-01 14:44       ` Lorenzo Pieralisi
2020-11-09 17:19 ` Vidya Sagar [this message]
2020-11-26 11:34   ` [PATCH V4 5/6] PCI: tegra: Check return value of tegra_pcie_init_controller() Thierry Reding
2020-11-09 17:19 ` [PATCH V4 6/6] PCI: tegra: Disable LTSSM during L2 entry Vidya Sagar
2020-11-26 11:34   ` Thierry Reding
2020-11-25 17:57 ` [PATCH V4 0/6] Enhancements to Tegra194 PCIe driver Thierry Reding
2020-11-25 19:51   ` Vidya Sagar
2020-11-26 11:31     ` Thierry Reding

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