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[104.57.184.186]) by smtp.gmail.com with ESMTPSA id l184sm4720513oih.27.2020.11.21.20.10.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 21 Nov 2020 20:10:59 -0800 (PST) Date: Sat, 21 Nov 2020 22:10:57 -0600 From: Bjorn Andersson To: Manivannan Sadhasivam Cc: agross@kernel.org, kishon@ti.com, vkoul@kernel.org, robh@kernel.org, svarbanov@mm-sol.com, bhelgaas@google.com, lorenzo.pieralisi@arm.com, linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, mgautam@codeaurora.org, devicetree@vger.kernel.org, truong@codeaurora.org Subject: Re: [PATCH v5 3/5] dt-bindings: pci: qcom: Document PCIe bindings for SM8250 SoC Message-ID: <20201122041057.GC95182@builder.lan> References: <20201027170033.8475-1-manivannan.sadhasivam@linaro.org> <20201027170033.8475-4-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20201027170033.8475-4-manivannan.sadhasivam@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org On Tue 27 Oct 12:00 CDT 2020, Manivannan Sadhasivam wrote: > Document the PCIe DT bindings for SM8250 SoC. The PCIe IP is similar to > the one used on SDM845, hence just add the compatible along with the > optional "atu" register region. > > Signed-off-by: Manivannan Sadhasivam > Acked-by: Rob Herring Reviewed-by: Bjorn Andersson > --- > Documentation/devicetree/bindings/pci/qcom,pcie.txt | 6 ++++-- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.txt b/Documentation/devicetree/bindings/pci/qcom,pcie.txt > index 02bc81bb8b2d..3b55310390a0 100644 > --- a/Documentation/devicetree/bindings/pci/qcom,pcie.txt > +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.txt > @@ -13,6 +13,7 @@ > - "qcom,pcie-ipq8074" for ipq8074 > - "qcom,pcie-qcs404" for qcs404 > - "qcom,pcie-sdm845" for sdm845 > + - "qcom,pcie-sm8250" for sm8250 > > - reg: > Usage: required > @@ -27,6 +28,7 @@ > - "dbi" DesignWare PCIe registers > - "elbi" External local bus interface registers > - "config" PCIe configuration space > + - "atu" ATU address space (optional) > > - device_type: > Usage: required > @@ -131,7 +133,7 @@ > - "slave_bus" AXI Slave clock > > -clock-names: > - Usage: required for sdm845 > + Usage: required for sdm845 and sm8250 > Value type: > Definition: Should contain the following entries > - "aux" Auxiliary clock > @@ -206,7 +208,7 @@ > - "ahb" AHB reset > > - reset-names: > - Usage: required for sdm845 > + Usage: required for sdm845 and sm8250 > Value type: > Definition: Should contain the following entries > - "pci" PCIe core reset > -- > 2.17.1 >