From: Vidya Sagar <vidyas@nvidia.com>
To: <lorenzo.pieralisi@arm.com>, <robh+dt@kernel.org>,
<bhelgaas@google.com>, <thierry.reding@gmail.com>,
<jonathanh@nvidia.com>, <amanharitsh123@gmail.com>,
<dinghao.liu@zju.edu.cn>, <kw@linux.com>
Cc: <linux-pci@vger.kernel.org>, <linux-tegra@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <kthota@nvidia.com>,
<mmaddireddy@nvidia.com>, <vidyas@nvidia.com>,
<sagar.tv@gmail.com>
Subject: [PATCH V5 4/5] PCI: tegra: Check return value of tegra_pcie_init_controller()
Date: Thu, 3 Dec 2020 19:04:50 +0530 [thread overview]
Message-ID: <20201203133451.17716-5-vidyas@nvidia.com> (raw)
In-Reply-To: <20201203133451.17716-1-vidyas@nvidia.com>
The return value of tegra_pcie_init_controller() must be checked before
PCIe link up check and registering debugfs entries subsequently as it
doesn't make sense to do these when the controller initialization itself
has failed.
Tested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
---
V5:
* Added Tested-by and Acked-by from Thierry Reding
V4:
* None
V3:
* New patch in this series
drivers/pci/controller/dwc/pcie-tegra194.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
index 471c6d725c70..f4109d71f20b 100644
--- a/drivers/pci/controller/dwc/pcie-tegra194.c
+++ b/drivers/pci/controller/dwc/pcie-tegra194.c
@@ -1563,7 +1563,11 @@ static int tegra_pcie_config_rp(struct tegra_pcie_dw *pcie)
goto fail_pm_get_sync;
}
- tegra_pcie_init_controller(pcie);
+ ret = tegra_pcie_init_controller(pcie);
+ if (ret < 0) {
+ dev_err(dev, "Failed to initialize controller: %d\n", ret);
+ goto fail_pm_get_sync;
+ }
pcie->link_state = tegra_pcie_dw_link_up(&pcie->pci);
if (!pcie->link_state) {
--
2.17.1
next prev parent reply other threads:[~2020-12-03 13:39 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-03 13:34 [PATCH V5 0/5] Enhancements to Tegra194 PCIe driver Vidya Sagar
2020-12-03 13:34 ` [PATCH V5 1/5] PCI: tegra: Fix ASPM-L1SS advertisement disable code Vidya Sagar
2020-12-03 13:34 ` [PATCH V5 2/5] PCI: tegra: Set DesignWare IP version Vidya Sagar
2020-12-03 13:34 ` [PATCH V5 3/5] PCI: tegra: Continue unconfig sequence even if parts fail Vidya Sagar
2020-12-03 13:34 ` Vidya Sagar [this message]
2020-12-03 13:34 ` [PATCH V5 5/5] PCI: tegra: Disable LTSSM during L2 entry Vidya Sagar
2020-12-07 20:37 ` Bjorn Helgaas
2020-12-08 6:12 ` Vidya Sagar
2020-12-07 16:44 ` [PATCH V5 0/5] Enhancements to Tegra194 PCIe driver Lorenzo Pieralisi
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