linux-pci.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: "Christian König" <ckoenig.leichtzumerken@gmail.com>
To: bhelgaas@google.com
Cc: devspam@moreofthesa.me.uk, amd-gfx@lists.freedesktop.org,
	dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org
Subject: [PATCH 4/4] PCI: add a REBAR size quirk for Sapphire RX 5600 XT Pulse.
Date: Tue,  5 Jan 2021 14:44:04 +0100	[thread overview]
Message-ID: <20210105134404.1545-5-christian.koenig@amd.com> (raw)
In-Reply-To: <20210105134404.1545-1-christian.koenig@amd.com>

Otherwise the CPU can't fully access the BAR.

Signed-off-by: Christian König <christian.koenig@amd.com>
---
 drivers/pci/pci.c | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 16216186b51c..b66e4703c214 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -3577,7 +3577,14 @@ u32 pci_rebar_get_possible_sizes(struct pci_dev *pdev, int bar)
 		return 0;
 
 	pci_read_config_dword(pdev, pos + PCI_REBAR_CAP, &cap);
-	return (cap & PCI_REBAR_CAP_SIZES) >> 4;
+	cap = (cap & PCI_REBAR_CAP_SIZES) >> 4;
+
+	/* Sapphire RX 5600 XT Pulse has an invalid cap dword for BAR 0 */
+	if (pdev->vendor == PCI_VENDOR_ID_ATI && pdev->device == 0x731f &&
+	    bar == 0 && cap == 0x700)
+		cap == 0x7f00;
+
+	return cap;
 }
 EXPORT_SYMBOL(pci_rebar_get_possible_sizes);
 
-- 
2.25.1


  parent reply	other threads:[~2021-01-05 13:44 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-05 13:44 A PCI quirk for resizeable BAR 0 on Navi10 Christian König
2021-01-05 13:44 ` [PATCH 1/4] pci: export pci_rebar_get_possible_sizes Christian König
2021-01-09  9:25   ` Christoph Hellwig
2021-01-05 13:44 ` [PATCH 2/4] pci: add BAR bytes->size helper & expose size->bytes helper v2 Christian König
2021-01-05 13:44 ` [PATCH 3/4] amdgpu: resize BAR0 to the maximum available size, even if it doesn't cover VRAM (v6) Christian König
2021-01-05 13:44 ` Christian König [this message]
2021-01-05 16:11   ` [PATCH 4/4] PCI: add a REBAR size quirk for Sapphire RX 5600 XT Pulse Ilia Mirkin
2021-01-05 17:43     ` Christian König
2021-01-05 17:28   ` kernel test robot
2021-01-05 18:41   ` [kbuild] " Dan Carpenter
2021-01-05 21:42 ` A PCI quirk for resizeable BAR 0 on Navi10 Bjorn Helgaas
2021-01-07 17:50 [PATCH 0/4] A PCI quirk for resizable " Nirmoy Das
2021-01-07 17:50 ` [PATCH 4/4] PCI: Add a REBAR size quirk for Sapphire RX 5600 XT Pulse Nirmoy Das
2021-01-07 21:32   ` Bjorn Helgaas
2021-01-07 20:25     ` Christian König

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20210105134404.1545-5-christian.koenig@amd.com \
    --to=ckoenig.leichtzumerken@gmail.com \
    --cc=amd-gfx@lists.freedesktop.org \
    --cc=bhelgaas@google.com \
    --cc=devspam@moreofthesa.me.uk \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=linux-pci@vger.kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).