From: Bjorn Helgaas <helgaas@kernel.org>
To: "刘乐乐(乐了)" <daniel.lll@alibaba-inc.com>
Cc: Ben Widawsky <ben.widawsky@intel.com>,
linux-cxl@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-pci@vger.kernel.org, linux-acpi@vger.kernel.org,
Ira Weiny <ira.weiny@intel.com>,
Dan Williams <dan.j.williams@intel.com>,
Vishal Verma <vishal.l.verma@intel.com>,
"Kelley, Sean V" <sean.v.kelley@intel.com>,
Rafael Wysocki <rafael.j.wysocki@intel.com>,
Jonathan Cameron <Jonathan.Cameron@Huawei.com>,
Jon Masters <jcm@jonmasters.org>,
Chris Browy <cbrowy@avery-design.com>,
Randy Dunlap <rdunlap@infradead.org>,
Christoph Hellwig <hch@infradead.org>,
"Xu, Di" <di.x@alibaba-inc.com>
Subject: Re: [RFC PATCH v3 00/16] CXL 2.0 Support
Date: Tue, 12 Jan 2021 10:19:23 -0600 [thread overview]
Message-ID: <20210112161923.GA1807814@bjorn-Precision-5520> (raw)
In-Reply-To: <0f2a6d62-09d8-416f-e972-3e9869c3e1a6@alibaba-inc.com>
On Tue, Jan 12, 2021 at 10:55:50PM +0800, 刘乐乐(乐了) wrote:
> Ben,
>
> Thanks for your hard work. I have compiled this patch(aff2b059786d ,
> cxl-2.0v3) together qemu emulator v3, this is the first time I see a CXL
> device in linux.
>
> Still I have problems, I can saw the CXL device with `lspci -vvv` and a
> device /dev/cxl/mem0 . But I can't see the memory in system and lsmem
> command.
>
> Qemu command line is :
>
> sudo ./qemu-cxl/build/qemu-system-x86_64 -enable-kvm -smp 8 -drive
> file=/mnt/lele/vm/cxl-centos8-uefi.qcow2,format=qcow2,cache=none -drive if=pflash,format=raw,unit=0,file=/mnt/lele/edk2/usr/share/edk2-ovmf/x64/OVMF_CODE.fd,readonly=on
> -drive if=pflash,format=raw,readonly,unit=1,file=/mnt/lele/edk2/usr/share/edk2-ovmf/x64/OVMF_VARS.fd
> -m 32G -vnc :12 -machine type=pc-q35-4.0,hmat=on,accel=kvm -net nic -net
> tap,ifname=tap1,script=/mnt/lele/vm/qemu-ifup,downscript=no -object memory-backend-file,id=cxl-mem1,share,mem-path=/mnt/lele/cxl-mem.dat,size=512M
> -device pxb-cxl,id=cxl.0,bus=pcie.0,bus_nr=52,uid=0,len-window-base=1,window-base[0]=0x4c0000000,memdev[0]=cxl-mem1
> -device cxl-rp,id=rp0,bus=cxl.0,addr=0.0,chassis=0,slot=0 -device
> cxl-type3,bus=rp0,memdev=cxl-mem1,id=cxl-pmem0,size=256M
>
> So, what's the further step to show the memory in system memory?
Please use plain text email only. Your response is valuable, but I
think the linux-kernel and linux-pci mailing lists rejected it because
it was a multi-part message with images and other non-text elements.
If you look at https://lore.kernel.org/linux-cxl/20210112151735.w45qbi37pc3zuucw@intel.com/T/#t,
you can see Ben's v3 00/16 email and his response to your response,
but your response is missing.
See http://vger.kernel.org/majordomo-info.html for details.
prev parent reply other threads:[~2021-01-12 16:20 UTC|newest]
Thread overview: 61+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-11 22:51 [RFC PATCH v3 00/16] CXL 2.0 Support Ben Widawsky
2021-01-11 22:51 ` [RFC PATCH v3 01/16] docs: cxl: Add basic documentation Ben Widawsky
2021-01-11 22:51 ` [RFC PATCH v3 02/16] cxl/acpi: Add an acpi_cxl module for the CXL interconnect Ben Widawsky
2021-01-12 7:08 ` Randy Dunlap
2021-01-12 18:43 ` Jonathan Cameron
2021-01-12 19:43 ` Dan Williams
2021-01-12 22:06 ` Jonathan Cameron
2021-01-13 17:55 ` Kaneda, Erik
2021-01-20 19:27 ` Dan Williams
2021-01-20 19:18 ` Verma, Vishal L
2021-01-13 12:40 ` Rafael J. Wysocki
2021-01-20 19:21 ` Verma, Vishal L
2021-01-11 22:51 ` [RFC PATCH v3 03/16] cxl/acpi: add OSC support Ben Widawsky
2021-01-12 15:09 ` Rafael J. Wysocki
2021-01-12 18:48 ` Jonathan Cameron
2021-01-11 22:51 ` [RFC PATCH v3 04/16] cxl/mem: Introduce a driver for CXL-2.0-Type-3 endpoints Ben Widawsky
2021-01-12 7:08 ` Randy Dunlap
2021-01-12 19:01 ` Jonathan Cameron
2021-01-12 20:06 ` Dan Williams
2021-01-11 22:51 ` [RFC PATCH v3 05/16] cxl/mem: Map memory device registers Ben Widawsky
2021-01-12 19:13 ` Jonathan Cameron
2021-01-12 19:21 ` Ben Widawsky
2021-01-12 20:40 ` Dan Williams
2021-01-11 22:51 ` [RFC PATCH v3 06/16] cxl/mem: Find device capabilities Ben Widawsky
2021-01-12 19:17 ` Jonathan Cameron
2021-01-12 19:22 ` Ben Widawsky
2021-01-11 22:51 ` [RFC PATCH v3 07/16] cxl/mem: Implement polled mode mailbox Ben Widawsky
2021-01-13 18:26 ` Jonathan Cameron
2021-01-14 17:40 ` Jonathan Cameron
2021-01-14 17:50 ` Ben Widawsky
2021-01-14 18:13 ` Jonathan Cameron
2021-01-11 22:51 ` [RFC PATCH v3 08/16] cxl/mem: Register CXL memX devices Ben Widawsky
2021-01-14 16:28 ` Jonathan Cameron
2021-01-11 22:51 ` [RFC PATCH v3 09/16] cxl/mem: Add basic IOCTL interface Ben Widawsky
2021-01-14 16:19 ` Jonathan Cameron
2021-01-11 22:51 ` [RFC PATCH v3 10/16] cxl/mem: Add send command Ben Widawsky
2021-01-14 17:10 ` Jonathan Cameron
2021-01-21 18:15 ` Ben Widawsky
2021-01-22 11:43 ` Jonathan Cameron
2021-01-22 17:08 ` Ben Widawsky
2021-01-11 22:51 ` [RFC PATCH v3 11/16] taint: add taint for direct hardware access Ben Widawsky
2021-01-11 22:51 ` [RFC PATCH v3 11/16] taint: add taint for unfettered " Ben Widawsky
2021-01-12 3:31 ` Ben Widawsky
2021-01-11 22:51 ` [RFC PATCH v3 12/16] cxl/mem: Add a "RAW" send command Ben Widawsky
2021-01-11 22:51 ` [RFC PATCH v3 13/16] cxl/mem: Create concept of enabled commands Ben Widawsky
2021-01-14 17:25 ` Jonathan Cameron
2021-01-21 18:40 ` Ben Widawsky
2021-01-22 11:28 ` Jonathan Cameron
2021-01-11 22:51 ` [RFC PATCH v3 14/16] cxl/mem: Use CEL for enabling commands Ben Widawsky
2021-01-14 18:02 ` Jonathan Cameron
2021-01-14 18:13 ` Ben Widawsky
2021-01-14 18:32 ` Jonathan Cameron
2021-01-14 19:04 ` Ben Widawsky
2021-01-14 19:24 ` Jonathan Cameron
2021-01-11 22:51 ` [RFC PATCH v3 15/16] cxl/mem: Add limited Get Log command (0401h) Ben Widawsky
2021-01-14 18:08 ` Jonathan Cameron
2021-01-23 0:14 ` Ben Widawsky
2021-01-11 22:51 ` [RFC PATCH v3 16/16] MAINTAINERS: Add maintainers of the CXL driver Ben Widawsky
2021-01-12 1:12 ` Joe Perches
[not found] ` <0f2a6d62-09d8-416f-e972-3e9869c3e1a6@alibaba-inc.com>
2021-01-12 15:17 ` [RFC PATCH v3 00/16] CXL 2.0 Support Ben Widawsky
2021-01-12 16:19 ` Bjorn Helgaas [this message]
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