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From: Bjorn Helgaas <helgaas@kernel.org>
To: Wasim Khan <wasim.khan@oss.nxp.com>
Cc: bhelgaas@google.com, linux-pci@vger.kernel.org,
	linux-kernel@vger.kernel.org, Wasim Khan <wasim.khan@nxp.com>
Subject: Re: [PATCH] PCI : check if type 0 devices have all BARs of size zero
Date: Mon, 15 Feb 2021 15:13:00 -0600	[thread overview]
Message-ID: <20210215211300.GA748236@bjorn-Precision-5520> (raw)
In-Reply-To: <20210212100856.473415-1-wasim.khan@oss.nxp.com>

On Fri, Feb 12, 2021 at 11:08:56AM +0100, Wasim Khan wrote:
> From: Wasim Khan <wasim.khan@nxp.com>
> 
> Log a message if all BARs of type 0 devices are of
> size zero. This can help detecting type 0 devices
> not reporting BAR size correctly.

I could be missing something, but I don't think we can do this.  I
would think the simplest possible presilicon testing would find errors
like this, and the first attempt to have a driver claim the device
would fail if required BARs were missing, so I'm not sure what this
would add.

While the subject line says "type 0 devices," this code path is also
used for type 1 devices (bridges), and it's quite common for bridges
to have no BARs, which means they would all be hardwired to zero.

It is also legal for even type 0 devices to implement no BARs.  They
may be operated entirely via config space or via device-specific BARs
that are unknown to the PCI core.

> Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
> ---
>  drivers/pci/probe.c | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
> index 953f15abc850..6438d6d56777 100644
> --- a/drivers/pci/probe.c
> +++ b/drivers/pci/probe.c
> @@ -321,6 +321,7 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
>  static void pci_read_bases(struct pci_dev *dev, unsigned int howmany, int rom)
>  {
>  	unsigned int pos, reg;
> +	bool found = false;
>  
>  	if (dev->non_compliant_bars)
>  		return;
> @@ -333,8 +334,12 @@ static void pci_read_bases(struct pci_dev *dev, unsigned int howmany, int rom)
>  		struct resource *res = &dev->resource[pos];
>  		reg = PCI_BASE_ADDRESS_0 + (pos << 2);
>  		pos += __pci_read_base(dev, pci_bar_unknown, res, reg);
> +		found |= res->flags ? 1 : 0;
>  	}
>  
> +	if (!dev->hdr_type && !found)
> +		pci_info(dev, "BAR size is 0 for BAR[0..%d]\n", howmany - 1);
> +
>  	if (rom) {
>  		struct resource *res = &dev->resource[PCI_ROM_RESOURCE];
>  		dev->rom_base_reg = rom;
> -- 
> 2.25.1
> 

  reply	other threads:[~2021-02-15 21:13 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-02-12 10:08 Wasim Khan
2021-02-15 21:13 ` Bjorn Helgaas [this message]
2021-02-16  7:52   ` Wasim Khan
2021-02-16 14:16     ` Bjorn Helgaas

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