From: Kishon Vijay Abraham I <kishon@ti.com>
To: Kishon Vijay Abraham I <kishon@ti.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Rob Herring <robh+dt@kernel.org>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Marc Zyngier <maz@kernel.org>
Cc: Tom Joseph <tjoseph@cadence.com>, <linux-omap@vger.kernel.org>,
<linux-pci@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
Lokesh Vutla <lokeshvutla@ti.com>
Subject: [PATCH 0/4] PCI: Add legacy interrupt support in pci-j721e
Date: Thu, 25 Mar 2021 14:39:32 +0530 [thread overview]
Message-ID: <20210325090936.9306-1-kishon@ti.com> (raw)
Patch series adds support for legacy interrupt in pci-j721e. There are
two HW implementations of legacy interrupt controller, one specific to
J721E and the other for J7200/AM64.
In both these implementations, the legacy interrupt is connect to pulse
interrupt of GIC and level to pulse is handled by configuring EOI
register.
Kishon Vijay Abraham I (4):
dt-bindings: PCI: ti,j721e: Add bindings to specify legacy interrupts
PCI: j721e: Add PCI legacy interrupt support for J721E
PCI: j721e: Add PCIe support for j7200
PCI: j721e: Add PCIe support for AM64
.../bindings/pci/ti,j721e-pci-host.yaml | 13 ++
drivers/pci/controller/cadence/pci-j721e.c | 194 +++++++++++++++++-
2 files changed, 201 insertions(+), 6 deletions(-)
--
2.17.1
next reply other threads:[~2021-03-25 9:10 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-25 9:09 Kishon Vijay Abraham I [this message]
2021-03-25 9:09 ` [PATCH 1/4] dt-bindings: PCI: ti,j721e: Add bindings to specify legacy interrupts Kishon Vijay Abraham I
2021-03-25 16:56 ` [PATCH 1/4] dt-bindings: PCI: ti, j721e: " Rob Herring
2021-03-25 9:09 ` [PATCH 2/4] PCI: j721e: Add PCI legacy interrupt support for J721E Kishon Vijay Abraham I
2021-03-25 20:41 ` Bjorn Helgaas
2021-03-25 9:09 ` [PATCH 3/4] PCI: j721e: Add PCIe support for j7200 Kishon Vijay Abraham I
2021-04-02 11:17 ` Marc Zyngier
2021-03-25 9:09 ` [PATCH 4/4] PCI: j721e: Add PCIe support for AM64 Kishon Vijay Abraham I
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210325090936.9306-1-kishon@ti.com \
--to=kishon@ti.com \
--cc=bhelgaas@google.com \
--cc=devicetree@vger.kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-omap@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=lokeshvutla@ti.com \
--cc=lorenzo.pieralisi@arm.com \
--cc=maz@kernel.org \
--cc=robh+dt@kernel.org \
--cc=tjoseph@cadence.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).