From: Lucas Stach <l.stach@pengutronix.de> To: Bjorn Helgaas <bhelgaas@google.com>, Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>, Rob Herring <robh+dt@kernel.org>, Richard Zhu <hongxing.zhu@nxp.com> Cc: NXP Linux Team <linux-imx@nxp.com>, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, kernel@pengutronix.de, patchwork-lst@pengutronix.de Subject: [PATCH 6/7] dt-bindings: imx6q-pcie: add compatibles for i.MX8MM PCIe Date: Mon, 10 May 2021 16:15:08 +0200 [thread overview] Message-ID: <20210510141509.929120-6-l.stach@pengutronix.de> (raw) In-Reply-To: <20210510141509.929120-1-l.stach@pengutronix.de> This adds compatibles for both the PCIe host controller and PCIe PHY found on the i.MX8MM SoC. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> --- Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt index 3ebd8553a818..f1f5651031a5 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt @@ -10,6 +10,7 @@ Required properties: - "fsl,imx6qp-pcie" - "fsl,imx7d-pcie" - "fsl,imx8mq-pcie" + - "fsl,imx8mm-pcie" - reg: base address and length of the PCIe controller - interrupts: A list of interrupt outputs of the controller. Must contain an entry for each entry in the interrupt-names property. @@ -90,12 +91,13 @@ Example: clock-names = "pcie", "pcie_bus", "pcie_phy"; }; -* Freescale i.MX7d PCIe PHY +* Freescale i.MX PCIe PHY -This is the PHY associated with the IMX7d PCIe controller. It's looked up by -the PCI-e controller via the fsl,imx7d-pcie-phy compatible. +This is the PHY associated with the IMX PCIe controller. It's looked up by +the PCI-e controller via the compatible. Required properties: - compatible: - "fsl,imx7d-pcie-phy" + - "fsl,imx8mm-pcie-phy" - reg: base address and length of the PCIe PHY controller -- 2.29.2
next prev parent reply other threads:[~2021-05-10 14:55 UTC|newest] Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-05-10 14:15 [PATCH 1/7] PCI: imx6: Move i.MX8MQ controller instance check to correct case statement Lucas Stach 2021-05-10 14:15 ` [PATCH 2/7] PCI: imx6: Initialize ATU unroll offset Lucas Stach 2021-05-11 20:03 ` Rob Herring 2021-05-10 14:15 ` [PATCH 3/7] PCI: imx6: Rework PHY search and mapping Lucas Stach 2021-05-10 17:05 ` Rob Herring 2021-05-11 8:11 ` Lucas Stach 2021-05-11 14:21 ` Rob Herring 2021-05-11 14:54 ` Lucas Stach 2021-05-11 15:22 ` Rob Herring 2021-08-04 11:55 ` Lorenzo Pieralisi 2021-05-10 14:15 ` [PATCH 4/7] dt-bindings: imx6q-pcie: add a property configure refclk pad usage mode Lucas Stach 2021-05-11 19:55 ` Rob Herring 2021-05-10 14:15 ` [PATCH 5/7] PCI: imx6: Configure PHY refclock according to DT property Lucas Stach 2021-05-10 14:15 ` Lucas Stach [this message] 2021-05-10 14:15 ` [PATCH 7/7] PCI: imx6: Add i.MX8MM support Lucas Stach 2021-06-23 13:46 ` [PATCH 1/7] PCI: imx6: Move i.MX8MQ controller instance check to correct case statement Lorenzo Pieralisi
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