From: Christoph Hellwig <hch@lst.de>
To: Prike Liang <Prike.Liang@amd.com>
Cc: helgaas@kernel.org, linux-pci@vger.kernel.org, kbusch@kernel.org,
axboe@fb.com, hch@lst.de, sagi@grimberg.me,
linux-nvme@lists.infradead.org, Alexander.Deucher@amd.com,
stable@vger.kernel.org, Shyam-sundar.S-k@amd.com
Subject: Re: [PATCH v5 0/2] nvme-pci: add AMD PCIe quirk for NVMe simple suspend/resume
Date: Tue, 18 May 2021 09:14:34 +0200 [thread overview]
Message-ID: <20210518071434.GA8635@lst.de> (raw)
In-Reply-To: <1621304675-17874-1-git-send-email-Prike.Liang@amd.com>
This looks ok to me now.
As a note to the people in AMD who came up with this scheme: having
to shut down the controller every time s2i is entered not only generally
uses more power than using power states, but also means every time
s2i is entered the SSD needs to write to the media, which causes massive
endurance shortfalls.
On Tue, May 18, 2021 at 10:24:33AM +0800, Prike Liang wrote:
> Those patch series can handle NVMe can't suspend to D3 during s2idle
> entry on some AMD platform. In this case, can be settld by assigning and
> passing a PCIe bus flag to the armed device which need NVMe shutdown opt
> in s2idle suspend and then use PCIe power setting to put the NVMe device
> to D3.
>
> Prike Liang (2):
> PCI: add AMD PCIe quirk for nvme shutdown opt
> nvme-pci: add AMD PCIe quirk for simple suspend/resume
>
> drivers/nvme/host/pci.c | 2 ++
> drivers/pci/probe.c | 5 ++++-
> drivers/pci/quirks.c | 7 +++++++
> include/linux/pci.h | 2 ++
> 4 files changed, 15 insertions(+), 1 deletion(-)
>
> --
> 2.7.4
---end quoted text---
prev parent reply other threads:[~2021-05-18 7:14 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-18 2:24 [PATCH v5 0/2] nvme-pci: add AMD PCIe quirk for NVMe simple suspend/resume Prike Liang
2021-05-18 2:24 ` [PATCH v5 1/2] PCI: add AMD PCIe quirk for nvme shutdown opt Prike Liang
2021-05-19 21:33 ` Bjorn Helgaas
2021-05-20 6:57 ` Liang, Prike
2021-05-20 16:58 ` Bjorn Helgaas
2021-05-20 17:40 ` Deucher, Alexander
2021-05-20 18:03 ` Keith Busch
2021-05-20 18:30 ` Deucher, Alexander
2021-05-20 20:34 ` Limonciello, Mario
2021-05-21 5:47 ` Liang, Prike
2021-05-20 19:00 ` Bjorn Helgaas
2021-05-18 2:24 ` [PATCH v5 2/2] nvme-pci: add AMD PCIe quirk for simple suspend/resume Prike Liang
2021-05-18 7:14 ` Christoph Hellwig [this message]
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