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From: Shradha Todi <shradha.t@samsung.com>
To: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org
Cc: jingoohan1@gmail.com, gustavo.pimentel@synopsys.com,
	lorenzo.pieralisi@arm.com, robh@kernel.org, bhelgaas@google.com,
	pankaj.dubey@samsung.com, p.rajanbabu@samsung.com,
	hari.tv@samsung.com, niyas.ahmed@samsung.com,
	l.mehra@samsung.com, Shradha Todi <shradha.t@samsung.com>
Subject: [PATCH 1/3] PCI: dwc: Add support for vendor specific capability search
Date: Tue, 18 May 2021 23:16:16 +0530	[thread overview]
Message-ID: <20210518174618.42089-2-shradha.t@samsung.com> (raw)
In-Reply-To: <20210518174618.42089-1-shradha.t@samsung.com>

Add vendor specific extended configuration space capability search API
using struct dw_pcie pointer for DW controllers.

Signed-off-by: Shradha Todi <shradha.t@samsung.com>
---
 drivers/pci/controller/dwc/pcie-designware.c | 16 ++++++++++++++++
 drivers/pci/controller/dwc/pcie-designware.h |  4 ++++
 2 files changed, 20 insertions(+)

diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c
index a945f0c0e73d..348f6f696976 100644
--- a/drivers/pci/controller/dwc/pcie-designware.c
+++ b/drivers/pci/controller/dwc/pcie-designware.c
@@ -90,6 +90,22 @@ static u16 dw_pcie_find_next_ext_capability(struct dw_pcie *pci, u16 start,
 	return 0;
 }
 
+u16 dw_pcie_find_vsec_capability(struct dw_pcie *pci, u8 vsec_cap)
+{
+	u16 vsec = 0;
+	u32 header;
+
+	while ((vsec = dw_pcie_find_next_ext_capability(pci, vsec,
+					PCI_EXT_CAP_ID_VNDR))) {
+		header = dw_pcie_readl_dbi(pci, vsec + PCI_VNDR_HEADER);
+		if (PCI_VNDR_HEADER_ID(header) == vsec_cap)
+			return vsec;
+	}
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(dw_pcie_find_vsec_capability);
+
 u16 dw_pcie_find_ext_capability(struct dw_pcie *pci, u8 cap)
 {
 	return dw_pcie_find_next_ext_capability(pci, 0, cap);
diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
index 7d6e9b7576be..307525aaa063 100644
--- a/drivers/pci/controller/dwc/pcie-designware.h
+++ b/drivers/pci/controller/dwc/pcie-designware.h
@@ -155,6 +155,9 @@
 #define MAX_IATU_IN			256
 #define MAX_IATU_OUT			256
 
+/* Synopsys Vendor specific data */
+#define DW_PCIE_RAS_CAP_ID		0x2
+
 struct pcie_port;
 struct dw_pcie;
 struct dw_pcie_ep;
@@ -284,6 +287,7 @@ struct dw_pcie {
 
 u8 dw_pcie_find_capability(struct dw_pcie *pci, u8 cap);
 u16 dw_pcie_find_ext_capability(struct dw_pcie *pci, u8 cap);
+u16 dw_pcie_find_vsec_capability(struct dw_pcie *pci, u8 vsec_cap);
 
 int dw_pcie_read(void __iomem *addr, int size, u32 *val);
 int dw_pcie_write(void __iomem *addr, int size, u32 val);
-- 
2.17.1


  parent reply	other threads:[~2021-05-19  3:54 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <CGME20210518173814epcas5p46b312c35e11c130a6a8d043f10d12ee4@epcas5p4.samsung.com>
2021-05-18 17:46 ` [PATCH 0/3] Add support for RAS DES feature in PCIe DW controller Shradha Todi
     [not found]   ` <CGME20210518173819epcas5p1ea10c2748b4bb0687184ff04a7a76796@epcas5p1.samsung.com>
2021-05-18 17:46     ` Shradha Todi [this message]
2021-05-21 23:31       ` [PATCH 1/3] PCI: dwc: Add support for vendor specific capability search Krzysztof Wilczyński
2021-05-27 11:49         ` Vidya Sagar
2021-05-27 11:54       ` Vidya Sagar
     [not found]   ` <CGME20210518173823epcas5p1cb9f93e209ca4055365048287ec43ee8@epcas5p1.samsung.com>
2021-05-18 17:46     ` [PATCH 2/3] PCI: debugfs: Add support for RAS framework in DWC Shradha Todi
2021-05-21 19:57       ` Bjorn Helgaas
2021-05-21 23:25       ` Krzysztof Wilczyński
2021-05-27 17:20       ` Vidya Sagar
     [not found]   ` <CGME20210518173826epcas5p32f6b141c9ab4b33e88638cf90a502ef1@epcas5p3.samsung.com>
2021-05-18 17:46     ` [PATCH 3/3] PCI: dwc: Create debugfs files in DWC driver Shradha Todi
2021-05-21 20:04       ` Bjorn Helgaas
2021-05-27 11:53       ` Vidya Sagar

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