From: Om Prakash Singh <omp@nvidia.com>
To: <vidyas@nvidia.com>, <lorenzo.pieralisi@arm.com>,
<bhelgaas@google.com>, <thierry.reding@gmail.com>,
<jonathanh@nvidia.com>
Cc: <linux-tegra@vger.kernel.org>, <linux-pci@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <kthota@nvidia.com>,
<mmaddireddy@nvidia.com>, Om Prakash Singh <omp@nvidia.com>
Subject: [RESEND PATCH V1 2/5] PCI: tegra: Fix MSI-X programming
Date: Thu, 27 May 2021 17:22:43 +0530 [thread overview]
Message-ID: <20210527115246.20509-3-omp@nvidia.com> (raw)
In-Reply-To: <20210527115246.20509-1-omp@nvidia.com>
Lower order MSI-X address is programmed in MSIX_ADDR_MATCH_HIGH_OFF
DBI register instead of higher order address. This patch fixes this
programming mistake.
Signed-off-by: Om Prakash Singh <omp@nvidia.com>
---
drivers/pci/controller/dwc/pcie-tegra194.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
index c51d666c9d87..58fc2615014d 100644
--- a/drivers/pci/controller/dwc/pcie-tegra194.c
+++ b/drivers/pci/controller/dwc/pcie-tegra194.c
@@ -1863,7 +1863,7 @@ static void pex_ep_event_pex_rst_deassert(struct tegra_pcie_dw *pcie)
val = (ep->msi_mem_phys & MSIX_ADDR_MATCH_LOW_OFF_MASK);
val |= MSIX_ADDR_MATCH_LOW_OFF_EN;
dw_pcie_writel_dbi(pci, MSIX_ADDR_MATCH_LOW_OFF, val);
- val = (lower_32_bits(ep->msi_mem_phys) & MSIX_ADDR_MATCH_HIGH_OFF_MASK);
+ val = (upper_32_bits(ep->msi_mem_phys) & MSIX_ADDR_MATCH_HIGH_OFF_MASK);
dw_pcie_writel_dbi(pci, MSIX_ADDR_MATCH_HIGH_OFF, val);
ret = dw_pcie_ep_init_complete(ep);
--
2.17.1
next prev parent reply other threads:[~2021-05-27 11:53 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-27 11:52 [RESEND PATCH V1 0/5] Update pcie-tegra194 driver Om Prakash Singh
2021-05-27 11:52 ` [RESEND PATCH V1 1/5] PCI: tegra: Fix handling BME_CHGED event Om Prakash Singh
2021-05-27 16:06 ` Bjorn Helgaas
2021-05-27 11:52 ` Om Prakash Singh [this message]
2021-05-27 12:14 ` [RESEND PATCH V1 2/5] PCI: tegra: Fix MSI-X programming Krzysztof Wilczyński
2021-05-27 11:52 ` [RESEND PATCH V1 3/5] PCI: tegra: Disable interrupts before entering L2 Om Prakash Singh
2021-05-27 12:13 ` Krzysztof Wilczyński
2021-05-27 11:52 ` [RESEND PATCH V1 4/5] PCI: tegra: Don't allow suspend when Tegra PCIe is in EP mode Om Prakash Singh
2021-05-27 12:05 ` Krzysztof Wilczyński
2021-05-27 21:00 ` Krzysztof Wilczyński
2021-05-27 11:52 ` [RESEND PATCH V1 5/5] PCI: tegra: Cleanup unused code Om Prakash Singh
2021-05-27 12:00 ` [RESEND PATCH V1 0/5] Update pcie-tegra194 driver Krzysztof Wilczyński
2021-05-27 12:49 ` Jon Hunter
2021-05-27 12:52 ` Krzysztof Wilczyński
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