linux-pci.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Bjorn Helgaas <helgaas@kernel.org>
To: Shanker R Donthineni <sdonthineni@nvidia.com>
Cc: Amey Narkhede <ameynarkhede03@gmail.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	alex.williamson@redhat.com,
	Raphael Norwitz <raphael.norwitz@nutanix.com>,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	kw@linux.com, Sinan Kaya <okaya@kernel.org>,
	Len Brown <lenb@kernel.org>,
	"Rafael J . Wysocki" <rjw@rjwysocki.net>
Subject: Re: [PATCH v7 7/8] PCI: Enable NO_BUS_RESET quirk for Nvidia GPUs
Date: Thu, 10 Jun 2021 18:53:19 -0500	[thread overview]
Message-ID: <20210610235319.GA2796526@bjorn-Precision-5520> (raw)
In-Reply-To: <762dd911-2899-f4e7-da38-860316febbf0@nvidia.com>

On Thu, Jun 10, 2021 at 06:43:26PM -0500, Shanker R Donthineni wrote:
> On 6/10/21 6:16 PM, Bjorn Helgaas wrote:
> >> From: Shanker Donthineni <sdonthineni@nvidia.com>
> >>
> >> On select platforms, some Nvidia GPU devices do not work with SBR.
> > Interesting that you say "on select platforms."  Apparently SBR does
> > work for some of these GPUs, but not on all platforms?  If you have
> > any clarification here, I can still update the commit log.
> >
> Yes, SBR works for some GPUs but GPUs which are listed in this quirk will
> not work and these GPUs are available only on selected server platforms.
> I believe commit text reflects the issue but please update if needed. 

It sounds like there is no actual dependency on the platform.  So even
though these GPUs are only available on certain platforms, if one were
to move one of them to a different, non-supported platform, SBR would
still not work.

So I think I'll remove the reference to "select platforms" since it
doesn't add any useful information and might suggest that SBR should
work on some platforms, if you could only find the right ones.

Bjorn

  reply	other threads:[~2021-06-10 23:53 UTC|newest]

Thread overview: 52+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-08  5:48 [PATCH v7 0/8] Expose and manage PCI device reset Amey Narkhede
2021-06-08  5:48 ` [PATCH v7 1/8] PCI: Add pcie_reset_flr to follow calling convention of other reset methods Amey Narkhede
2021-06-10 20:15   ` Shanker R Donthineni
2021-06-17 21:57   ` Bjorn Helgaas
2021-06-17 22:51     ` Alex Williamson
2021-06-18 16:32     ` Amey Narkhede
2021-06-24 12:23   ` Bjorn Helgaas
2021-06-24 15:28     ` Amey Narkhede
2021-06-24 16:15       ` Bjorn Helgaas
2021-06-24 18:48         ` Alex Williamson
2021-06-08  5:48 ` [PATCH v7 2/8] PCI: Add new array for keeping track of ordering of " Amey Narkhede
2021-06-10 20:15   ` Shanker R Donthineni
2021-06-17 23:13   ` Bjorn Helgaas
2021-06-18 17:22     ` Amey Narkhede
2021-06-21 15:02       ` Shanker R Donthineni
2021-06-21 17:15         ` Amey Narkhede
2021-06-21 18:37           ` Bjorn Helgaas
2021-06-08  5:48 ` [PATCH v7 3/8] PCI: Remove reset_fn field from pci_dev Amey Narkhede
2021-06-10 20:16   ` Shanker R Donthineni
2021-06-08  5:48 ` [PATCH v7 4/8] PCI/sysfs: Allow userspace to query and set device reset mechanism Amey Narkhede
2021-06-09 21:57   ` Raphael Norwitz
2021-06-09 22:36     ` Shanker R Donthineni
2021-06-09 22:48       ` Raphael Norwitz
2021-06-10 20:16   ` Shanker R Donthineni
2021-06-18 20:00   ` Bjorn Helgaas
2021-06-19 13:59     ` Amey Narkhede
2021-06-21 13:01       ` Bjorn Helgaas
2021-06-21 17:28         ` Amey Narkhede
2021-06-21 19:07           ` Bjorn Helgaas
2021-06-21 19:33             ` Amey Narkhede
2021-06-23 12:06               ` Bjorn Helgaas
2021-06-23 14:07                 ` Amey Narkhede
2021-06-23 17:56                   ` Amey Narkhede
2021-06-23 17:21         ` Alex Williamson
2021-06-24 12:15   ` Bjorn Helgaas
2021-06-24 15:12     ` Amey Narkhede
2021-06-24 16:56       ` Bjorn Helgaas
2021-06-24 17:20         ` Shanker R Donthineni
2021-06-24 17:28         ` Amey Narkhede
2021-06-24 17:59           ` Bjorn Helgaas
2021-06-08  5:48 ` [PATCH v7 5/8] PCI: Setup ACPI_COMPANION early Amey Narkhede
2021-06-08  5:48 ` [PATCH v7 6/8] PCI: Add support for ACPI _RST reset method Amey Narkhede
2021-06-08  5:48 ` [PATCH v7 7/8] PCI: Enable NO_BUS_RESET quirk for Nvidia GPUs Amey Narkhede
2021-06-10 23:16   ` Bjorn Helgaas
2021-06-10 23:33     ` Shanker R Donthineni
2021-06-10 23:43     ` Shanker R Donthineni
2021-06-10 23:53       ` Bjorn Helgaas [this message]
2021-06-11  4:15         ` Shanker R Donthineni
2021-06-08  5:48 ` [PATCH v7 8/8] PCI: Change the type of probe argument in reset functions Amey Narkhede
2021-06-09 21:40   ` Raphael Norwitz
2021-06-08 10:05 ` [PATCH v7 0/8] Expose and manage PCI device reset Enrico Weigelt, metux IT consult
2021-06-08 15:44   ` Amey Narkhede

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20210610235319.GA2796526@bjorn-Precision-5520 \
    --to=helgaas@kernel.org \
    --cc=alex.williamson@redhat.com \
    --cc=ameynarkhede03@gmail.com \
    --cc=bhelgaas@google.com \
    --cc=kw@linux.com \
    --cc=lenb@kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=okaya@kernel.org \
    --cc=raphael.norwitz@nutanix.com \
    --cc=rjw@rjwysocki.net \
    --cc=sdonthineni@nvidia.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).