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From: Bjorn Helgaas <helgaas@kernel.org>
To: Jon Hunter <jonathanh@nvidia.com>
Cc: Vidya Sagar <vidyas@nvidia.com>,
	lorenzo.pieralisi@arm.com, bhelgaas@google.com,
	robh+dt@kernel.org, amurray@thegoodpenguin.co.uk,
	gustavo.pimentel@synopsys.com, jingoohan1@gmail.com,
	Joao.Pinto@synopsys.com, Thierry Reding <treding@nvidia.com>,
	Krishna Thota <kthota@nvidia.com>,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: Query regarding the use of pcie-designware-plat.c file
Date: Tue, 15 Jun 2021 14:42:09 -0500	[thread overview]
Message-ID: <20210615194209.GA2908457@bjorn-Precision-5520> (raw)
In-Reply-To: <2970bdf2-bef2-bdcb-6ee3-ac1181d97b78@nvidia.com>

On Wed, Jun 09, 2021 at 05:54:38PM +0100, Jon Hunter wrote:
> 
> On 09/06/2021 17:30, Bjorn Helgaas wrote:
> > On Wed, Jun 09, 2021 at 12:52:37AM +0530, Vidya Sagar wrote:
> >> Hi,
> >> I would like to know what is the use of pcie-designware-plat.c file. This
> >> looks like a skeleton file and can't really work with any specific hardware
> >> as such.
> >> Some context for this mail thread is, if the config CONFIG_PCIE_DW_PLAT is
> >> enabled in a system where a Synopsys DesignWare IP based PCIe controller is
> >> present and its configuration is enabled (Ex:- Tegra194 system with
> >> CONFIG_PCIE_TEGRA194_HOST enabled), then, it can so happen that the probe of
> >> pcie-designware-plat.c called first (because all DWC based PCIe controller
> >> nodes have "snps,dw-pcie" compatibility string) and can crash the system.
> > 
> > What's the crash?  If a device claims to be compatible with
> > "snps,dw-pcie" and pcie-designware-plat.c claims to know how to
> > operate "snps,dw-pcie" devices, it seems like something is wrong.
> > 
> > "snps,dw-pcie" is a generic device type, so pcie-designware-plat.c
> > might not know how to operate device-specific details of some of those
> > devices, but basic functionality should work and it certainly
> > shouldn't crash.
> 
> It is not really a crash but a hang when trying to access the hardware
> before it has been properly initialised.

This doesn't really answer my question.

If the hardware claims to be compatible with "snps,dw-pcie" and a
driver knows how to operate "snps,dw-pcie" devices, it should work.

If the hardware requires initialization that is not part of the
"snps,dw-pcie" programming model, it should not claim to be compatible
with "snps,dw-pcie".  Or, if pcie-designware-plat.c is missing some
init that *is* part of the programming model, maybe it needs to be
enhanced?

> The scenario I saw was that if the Tegra194 PCIe driver was built as a
> module but the pcie-designware-plat.c was built into the kernel, then on
> boot we would attempt to probe the pcie-designware-plat.c driver because
> module was not available yet and this would hang. Hence, I removed the
> "snps,dw-pcie" compatible string for Tegra194 to avoid this and ONLY
> probe the Tegra194 PCIe driver.

Maybe something like driver_override (I know this is supported via
sysfs, but maybe not via a kernel parameter) or a module parameter for
pcie-designware-plat.c to keep it from claiming devices?

> Sagar is wondering why this hang is only seen/reported for Tegra and
> could this happen to other platforms? I think that is potentially could.

Maybe pcie-designware-plat.c works on other platforms, i.e., they
don't require the hardware init?

  reply	other threads:[~2021-06-15 19:42 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-08 19:22 Query regarding the use of pcie-designware-plat.c file Vidya Sagar
2021-06-08 21:17 ` Gustavo Pimentel
2021-06-09  5:26   ` Vidya Sagar
2021-06-09  9:49     ` Thierry Reding
2021-06-15  3:28       ` Vidya Sagar
2021-06-09 16:30 ` Bjorn Helgaas
2021-06-09 16:54   ` Jon Hunter
2021-06-15 19:42     ` Bjorn Helgaas [this message]
2021-06-15 21:05       ` Rob Herring
2021-06-16  7:54       ` Jon Hunter
2021-06-20 13:35         ` Vidya Sagar

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