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From: "David E. Box" <david.e.box@linux.intel.com>
To: lee.jones@linaro.org, bhelgaas@google.com, andy.shevchenko@gmail.com
Cc: "David E. Box" <david.e.box@linux.intel.com>,
	mgross@linux.intel.com, srinivas.pandruvada@intel.com,
	linux-kernel@vger.kernel.org,
	platform-driver-x86@vger.kernel.org, linux-pci@vger.kernel.org
Subject: [PATCH v3 4/5] MFD: intel_pmt: Add DG2 support
Date: Wed, 22 Sep 2021 14:30:06 -0700	[thread overview]
Message-ID: <20210922213007.2738388-5-david.e.box@linux.intel.com> (raw)
In-Reply-To: <20210922213007.2738388-1-david.e.box@linux.intel.com>

Add Platform Monitoring Technology support for DG2 platforms.

Signed-off-by: David E. Box <david.e.box@linux.intel.com>
---

V3:	No change

V2:	New patch

 drivers/mfd/intel_pmt.c                | 9 +++++++++
 drivers/platform/x86/intel/pmt/class.c | 2 ++
 2 files changed, 11 insertions(+)

diff --git a/drivers/mfd/intel_pmt.c b/drivers/mfd/intel_pmt.c
index 08e07b31aeec..a6fe50f65479 100644
--- a/drivers/mfd/intel_pmt.c
+++ b/drivers/mfd/intel_pmt.c
@@ -94,6 +94,11 @@ static const struct pmt_platform_info dg1_info = {
 	.capabilities = dg1_capabilities,
 };
 
+/* DG2 Platform */
+static const struct pmt_platform_info dg2_info = {
+	.quirks = PMT_QUIRK_TABLE_SHIFT
+};
+
 static bool intel_ext_cap_allowed(u16 id)
 {
 	int i;
@@ -334,11 +339,15 @@ static void pmt_pci_remove(struct pci_dev *pdev)
 
 #define PCI_DEVICE_ID_INTEL_PMT_ADL	0x467d
 #define PCI_DEVICE_ID_INTEL_PMT_DG1	0x490e
+#define PCI_DEVICE_ID_INTEL_PMT_DG2_G10	0x4f93
+#define PCI_DEVICE_ID_INTEL_PMT_DG2_G11	0x4f95
 #define PCI_DEVICE_ID_INTEL_PMT_OOBMSM	0x09a7
 #define PCI_DEVICE_ID_INTEL_PMT_TGL	0x9a0d
 static const struct pci_device_id pmt_pci_ids[] = {
 	{ PCI_DEVICE_DATA(INTEL, PMT_ADL, &tgl_info) },
 	{ PCI_DEVICE_DATA(INTEL, PMT_DG1, &dg1_info) },
+	{ PCI_DEVICE_DATA(INTEL, PMT_DG2_G10, &dg2_info) },
+	{ PCI_DEVICE_DATA(INTEL, PMT_DG2_G11, &dg2_info) },
 	{ PCI_DEVICE_DATA(INTEL, PMT_OOBMSM, NULL) },
 	{ PCI_DEVICE_DATA(INTEL, PMT_TGL, &tgl_info) },
 	{ }
diff --git a/drivers/platform/x86/intel/pmt/class.c b/drivers/platform/x86/intel/pmt/class.c
index 659b1073033c..f2a8e19a02e7 100644
--- a/drivers/platform/x86/intel/pmt/class.c
+++ b/drivers/platform/x86/intel/pmt/class.c
@@ -29,6 +29,8 @@
 static const struct pci_device_id pmt_telem_early_client_pci_ids[] = {
 	{ PCI_VDEVICE(INTEL, 0x467d) }, /* ADL */
 	{ PCI_VDEVICE(INTEL, 0x490e) }, /* DG1 */
+	{ PCI_VDEVICE(INTEL, 0x4f93) }, /* DG2_G10 */
+	{ PCI_VDEVICE(INTEL, 0x4f95) }, /* DG2_G11 */
 	{ PCI_VDEVICE(INTEL, 0x9a0d) }, /* TGL */
 	{ }
 };
-- 
2.25.1


  parent reply	other threads:[~2021-09-22 21:30 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-22 21:30 [PATCH v3 0/5] Add general DVSEC/VSEC support David E. Box
2021-09-22 21:30 ` [PATCH v3 1/5] PCI: Add #defines for accessing PCIE DVSEC fields David E. Box
2021-09-27 17:30   ` Bjorn Helgaas
2021-09-22 21:30 ` [PATCH v3 2/5] MFD: intel_pmt: Support non-PMT capabilities David E. Box
2021-09-27 17:36   ` Greg KH
2021-09-27 18:40     ` David E. Box
2021-09-28  5:01       ` Greg KH
2021-09-28  7:54       ` Lee Jones
2021-09-28  9:10         ` Greg KH
2021-09-28 10:03           ` Lee Jones
2021-09-22 21:30 ` [PATCH v3 3/5] MFD: intel_pmt: Add support for PCIe VSEC structures David E. Box
2021-09-22 21:30 ` David E. Box [this message]
2021-09-22 21:30 ` [PATCH v3 5/5] MFD: intel_extended_cap: Add support for Intel SDSi David E. Box
2021-09-23  9:04 ` [PATCH v3 0/5] Add general DVSEC/VSEC support Hans de Goede
2021-09-23 15:44   ` David E. Box

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