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From: Dongdong Liu <liudongdong3@huawei.com>
To: <helgaas@kernel.org>, <hch@infradead.org>, <kw@linux.com>,
	<logang@deltatee.com>, <leon@kernel.org>,
	<linux-pci@vger.kernel.org>, <rajur@chelsio.com>,
	<hverkuil-cisco@xs4all.nl>
Cc: <linux-media@vger.kernel.org>, <netdev@vger.kernel.org>
Subject: [PATCH V10 8/8] PCI/IOV: Enable 10-Bit Tag support for PCIe VF devices
Date: Sat, 9 Oct 2021 18:49:38 +0800	[thread overview]
Message-ID: <20211009104938.48225-9-liudongdong3@huawei.com> (raw)
In-Reply-To: <20211009104938.48225-1-liudongdong3@huawei.com>

Enable 10-Bit Tag Requester for the VF devices below the
Root Port that support 10-Bit Tag Completer.

Signed-off-by: Dongdong Liu <liudongdong3@huawei.com>
---
 drivers/pci/iov.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/drivers/pci/iov.c b/drivers/pci/iov.c
index bd600c15258f..760ee8b939cd 100644
--- a/drivers/pci/iov.c
+++ b/drivers/pci/iov.c
@@ -692,6 +692,15 @@ static int sriov_enable(struct pci_dev *dev, int nr_virtfn)
 
 	pci_iov_set_numvfs(dev, nr_virtfn);
 	iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE;
+
+	if ((pcie_tag_config == PCIE_TAG_DEFAULT) &&
+	    (iov->cap & PCI_SRIOV_CAP_VF_10BIT_TAG_REQ) &&
+	    pcie_rp_10bit_tag_cmp_supported(dev))
+		iov->ctrl |= PCI_SRIOV_CTRL_VF_10BIT_TAG_REQ_EN;
+
+	if (pcie_tag_config == PCIE_TAG_PEER2PEER)
+		iov->ctrl &= ~PCI_SRIOV_CTRL_VF_10BIT_TAG_REQ_EN;
+
 	pci_cfg_access_lock(dev);
 	pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
 	msleep(100);
@@ -708,6 +717,7 @@ static int sriov_enable(struct pci_dev *dev, int nr_virtfn)
 
 err_pcibios:
 	iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
+	iov->ctrl &= ~PCI_SRIOV_CTRL_VF_10BIT_TAG_REQ_EN;
 	pci_cfg_access_lock(dev);
 	pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
 	ssleep(1);
@@ -740,6 +750,7 @@ static void sriov_disable(struct pci_dev *dev)
 
 	sriov_del_vfs(dev);
 	iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
+	iov->ctrl &= ~PCI_SRIOV_CTRL_VF_10BIT_TAG_REQ_EN;
 	pci_cfg_access_lock(dev);
 	pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
 	ssleep(1);
-- 
2.22.0


      parent reply	other threads:[~2021-10-09 10:53 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-09 10:49 [PATCH V10 0/8] PCI: Enable 10-Bit tag support for PCIe devices Dongdong Liu
2021-10-09 10:49 ` [PATCH V10 1/8] PCI: Use cached devcap in more places Dongdong Liu
2021-10-09 10:49 ` [PATCH V10 2/8] PCI: Cache Device Capabilities 2 Register Dongdong Liu
2021-10-09 10:49 ` [PATCH V10 3/8] PCI: Add 10-Bit Tag register definitions Dongdong Liu
2021-10-09 10:49 ` [PATCH V10 4/8] PCI/sysfs: Add a 10-Bit Tag sysfs file PCIe Endpoint devices Dongdong Liu
2021-10-27 22:28   ` Bjorn Helgaas
2021-10-28  7:44     ` Dongdong Liu
2021-10-28 17:24       ` Bjorn Helgaas
2021-10-29  7:16         ` Dongdong Liu
2021-10-09 10:49 ` [PATCH V10 5/8] PCI/IOV: Add 10-Bit Tag sysfs files for VF devices Dongdong Liu
2021-10-09 10:49 ` [PATCH V10 6/8] PCI/P2PDMA: Add a 10-Bit Tag check in P2PDMA Dongdong Liu
2021-10-27 21:20   ` Bjorn Helgaas
2021-10-28  7:56     ` Dongdong Liu
2021-10-27 23:11   ` Bjorn Helgaas
2021-10-27 23:41     ` Logan Gunthorpe
2021-10-28  1:39       ` Bjorn Helgaas
2021-10-28 15:56         ` Logan Gunthorpe
2021-10-09 10:49 ` [PATCH V10 7/8] PCI: Enable 10-Bit Tag support for PCIe Endpoint device Dongdong Liu
2021-10-09 10:49 ` Dongdong Liu [this message]

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