From: "Pali Rohár" <pali@kernel.org>
To: Rob Herring <robh@kernel.org>
Cc: Naveen Naidu <naveennaidu479@gmail.com>,
Bjorn Helgaas <helgaas@kernel.org>,
Bjorn Helgaas <bhelgaas@google.com>,
PCI <linux-pci@vger.kernel.org>,
linux-kernel-mentees@lists.linuxfoundation.org,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 02/22] PCI: Unify PCI error response checking
Date: Thu, 14 Oct 2021 00:03:14 +0200 [thread overview]
Message-ID: <20211013220314.pz3dzskd23axkdg4@pali> (raw)
In-Reply-To: <CAL_JsqL0d4qOR+wsnpdRUc+EQ6_diUzPbMj3Tv-Ly29or6Asvw@mail.gmail.com>
On Wednesday 13 October 2021 16:47:43 Rob Herring wrote:
> On Wed, Oct 13, 2021 at 12:17 PM Naveen Naidu <naveennaidu479@gmail.com> wrote:
> > The thread does bring up a good point, about not returning any error
> > values in pci_read_config_*() and converting the function definition to
> > something like
> >
> > void pci_read_config_word(struct pci_dev *dev, int where, u16 *val)
> >
> > The reason stated in the thread was that, the error values returned from
> > these functions are either ignored or are not used properly. And
> > whenever an error occurs, the error value ~0 is anyway stored in val, we
> > could use that to test errors.
>
> Presumably, there could be some register somewhere where all 1s is
> valid? So I think we need the error values.
I guess that "Prefetchable Base/Limit Upper 32 Bits" PCI registers can
contains all-ones value and it is valid value in these registers.
And also PCIe regs like "Slot Capabilities Register" can also have all
bits set.
So 0xffffffff does not mean that error happened. It is needed some
application logic which can decide based on other things (like register
number, device state, etc...) if 0xffffffff indicates error or not.
Therefore return errno values can help, but only for controllers which
provide this additional errno information.
> Also, I seem to recall only the vendor/device IDs are defined to be
> all 1s for non-existent devices. Other errors are undefined?
In PCIe spec for vendor id register is mentioned that 0xffff indicates
no Function is present.
next prev parent reply other threads:[~2021-10-13 22:03 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-11 17:35 [PATCH 00/22] PCI: Unify PCI error response checking Naveen Naidu
2021-10-11 17:37 ` [PATCH 01/22] PCI: Add PCI_ERROR_RESPONSE and it's related defintions Naveen Naidu
2021-10-11 17:38 ` [PATCH 02/22] PCI: Unify PCI error response checking Naveen Naidu
2021-10-11 22:05 ` Rob Herring
2021-10-12 16:21 ` Naveen Naidu
2021-10-12 18:02 ` Rob Herring
2021-10-12 22:52 ` Pali Rohár
2021-10-13 2:43 ` Bjorn Helgaas
2021-10-13 13:06 ` Rob Herring
2021-10-13 17:16 ` Naveen Naidu
2021-10-13 17:54 ` Pali Rohár
2021-10-13 18:48 ` Bjorn Helgaas
2021-10-13 21:47 ` Rob Herring
2021-10-13 22:03 ` Pali Rohár [this message]
2021-10-13 22:12 ` Bjorn Helgaas
2021-10-11 17:45 ` [PATCH 03/22] PCI: thunder: Use SET_PCI_ERROR_RESPONSE() when device not found Naveen Naidu
2021-10-11 17:46 ` [PATCH 04/22] PCI: iproc: " Naveen Naidu
2021-10-11 17:51 ` [PATCH 05/22] PCI: mediatek: " Naveen Naidu
2021-10-11 17:52 ` [PATCH 06/22] PCI: exynos: " Naveen Naidu
2021-10-11 17:53 ` [PATCH 07/22] PCI: histb: " Naveen Naidu
2021-10-11 17:55 ` [PATCH 08/22] PCI: kirin: " Naveen Naidu
2021-10-11 17:56 ` [PATCH 09/22] PCI: aardvark: " Naveen Naidu
2021-10-11 18:08 ` Pali Rohár
2021-10-11 18:28 ` Naveen Naidu
[not found] ` <20211011182526.kboaxqofdpd2jjrl@theprophet>
2021-10-11 18:41 ` Pali Rohár
2021-10-12 15:59 ` Naveen Naidu
2021-10-13 2:13 ` Bjorn Helgaas
2021-10-13 17:59 ` Pali Rohár
2021-10-11 18:00 ` [PATCH 10/22] PCI: mvebu: " Naveen Naidu
2021-10-11 18:00 ` [PATCH 11/22] PCI: altera: " Naveen Naidu
2021-10-11 18:02 ` [PATCH 12/22] PCI: rcar: " Naveen Naidu
2021-10-11 18:02 ` [PATCH 13/22] PCI: rockchip: " Naveen Naidu
2021-10-11 18:04 ` [PATCH 14/22] PCI/ERR: Use RESPONSE_IS_PCI_ERROR() to check read from hardware Naveen Naidu
2021-10-11 18:06 ` [PATCH 15/22] PCI: vmd: " Naveen Naidu
2021-10-14 18:04 ` Jonathan Derrick
2021-10-11 18:07 ` [PATCH 16/22] PCI: pciehp: " Naveen Naidu
2021-10-11 19:47 ` Lukas Wunner
2021-10-12 16:05 ` Naveen Naidu
2021-10-12 23:12 ` Pali Rohár
2021-10-13 12:20 ` Lukas Wunner
2021-10-11 18:08 ` [PATCH 17/22] PCI/DPC: " Naveen Naidu
2021-10-11 18:10 ` [PATCH 18/22] PCI/PME: " Naveen Naidu
2021-10-11 18:11 ` [PATCH 19/22] PCI: cpqphp: " Naveen Naidu
2021-10-11 18:11 ` [PATCH 20/22] PCI: keystone: Use PCI_ERROR_RESPONSE to specify hardware error Naveen Naidu
2021-10-11 18:12 ` [PATCH 21/22] PCI: hv: Use PCI_ERROR_RESPONSE to specify hardware read error Naveen Naidu
2021-10-11 18:13 ` [PATCH 22/22] PCI: xgene: Use PCI_ERROR_RESPONSE to specify hardware error Naveen Naidu
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