From: "Pali Rohár" <pali@kernel.org>
To: "Maciej W. Rozycki" <macro@orcam.me.uk>
Cc: "Thomas Bogendoerfer" <tsbogend@alpha.franken.de>,
"Russell King" <linux@armlinux.org.uk>,
"Andrew Lunn" <andrew@lunn.ch>,
"Sebastian Hesselbarth" <sebastian.hesselbarth@gmail.com>,
"Gregory Clement" <gregory.clement@bootlin.com>,
"Jason Gunthorpe" <jgg@nvidia.com>,
"Marek Behún" <kabel@kernel.org>,
linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] PCI: Marvell: Update PCIe fixup
Date: Wed, 3 Nov 2021 16:03:16 +0100 [thread overview]
Message-ID: <20211103150316.6vjtycnak5nkkiuz@pali> (raw)
In-Reply-To: <alpine.DEB.2.21.2111031430500.57165@angie.orcam.me.uk>
On Wednesday 03 November 2021 14:49:07 Maciej W. Rozycki wrote:
> On Tue, 2 Nov 2021, Pali Rohár wrote:
>
> > Hello Maciej! Thank you very much for the explanation!
>
> You are welcome!
>
> > I'm surprised that Marvell copied this 20 years old MIPS Galileo PCI
> > logic into followup ARM SoC PCIe IPs (and later also into recent ARM64
> > A3720 SoC PCIe IP), removed configuration of PCI class code via
> > strapping pins and let default PCI class code value to Memory device,
> > even also when PCIe controller is running in Root Complex mode. And so
> > correction can be done only from "CPU bus".
>
> Still the bootstrap firmware (say U-boot, as I can see it mentioned in
> your reference) can write the correct value to the class code register.
> Or can it?
Yes, it can. And I have already sent patches to do it.
next prev parent reply other threads:[~2021-11-03 15:03 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-01 15:04 [PATCH] PCI: Marvell: Update PCIe fixup Pali Rohár
2021-11-01 16:27 ` Jason Gunthorpe
2021-11-01 17:56 ` Pali Rohár
2021-11-01 18:03 ` Jason Gunthorpe
2021-11-02 8:42 ` Thomas Bogendoerfer
2021-11-02 9:02 ` Pali Rohár
2021-11-02 9:47 ` Thomas Bogendoerfer
2021-11-02 10:00 ` Pali Rohár
2021-11-02 12:35 ` Maciej W. Rozycki
2021-11-02 12:58 ` Pali Rohár
2021-11-02 14:01 ` Maciej W. Rozycki
2021-11-02 14:49 ` Pali Rohár
2021-11-02 15:48 ` Pali Rohár
2021-11-02 17:03 ` Stefan Roese
2021-11-03 14:59 ` Maciej W. Rozycki
2021-11-03 14:49 ` Maciej W. Rozycki
2021-11-03 15:03 ` Pali Rohár [this message]
2021-11-02 15:02 ` Thomas Bogendoerfer
2021-11-02 15:13 ` Pali Rohár
2021-11-09 23:42 ` Pali Rohár
2021-11-10 8:55 ` Thomas Bogendoerfer
2021-11-02 17:12 ` [PATCH v2 1/2] ARM: " Pali Rohár
2021-11-09 22:53 ` Pali Rohár
2022-05-14 18:21 ` Pali Rohár
2022-07-07 18:31 ` Pali Rohár
2022-07-07 19:22 ` Russell King (Oracle)
2022-02-19 14:30 ` Pali Rohár
2022-07-18 10:34 ` Gregory CLEMENT
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20211103150316.6vjtycnak5nkkiuz@pali \
--to=pali@kernel.org \
--cc=andrew@lunn.ch \
--cc=gregory.clement@bootlin.com \
--cc=jgg@nvidia.com \
--cc=kabel@kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mips@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=linux@armlinux.org.uk \
--cc=macro@orcam.me.uk \
--cc=sebastian.hesselbarth@gmail.com \
--cc=tsbogend@alpha.franken.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).