From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
To: Andy Gross <agross@kernel.org>,
Bjorn Andersson <bjorn.andersson@linaro.org>,
Rob Herring <robh+dt@kernel.org>, Vinod Koul <vkoul@kernel.org>,
Kishon Vijay Abraham I <kishon@ti.com>,
Stanimir Varbanov <svarbanov@mm-sol.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: "Bjorn Helgaas" <bhelgaas@google.com>,
"Krzysztof Wilczyński" <kw@linux.com>,
linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org,
devicetree@vger.kernel.org, linux-phy@lists.infradead.org
Subject: [PATCH v3 05/10] PCI: qcom: Add ddrss_sf_tbu flag
Date: Sat, 11 Dec 2021 05:17:53 +0300 [thread overview]
Message-ID: <20211211021758.1712299-6-dmitry.baryshkov@linaro.org> (raw)
In-Reply-To: <20211211021758.1712299-1-dmitry.baryshkov@linaro.org>
Qualcomm PCIe driver uses compatible string to check if the ddrss_sf_tbu
clock should be used. Since sc7280 support has added flags, switch to
the new mechanism to check if this clock should be used.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/pci/controller/dwc/pcie-qcom.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
index 51a0475173fb..2f9a9497733e 100644
--- a/drivers/pci/controller/dwc/pcie-qcom.c
+++ b/drivers/pci/controller/dwc/pcie-qcom.c
@@ -195,6 +195,7 @@ struct qcom_pcie_ops {
struct qcom_pcie_cfg {
const struct qcom_pcie_ops *ops;
unsigned int pipe_clk_need_muxing:1;
+ unsigned int has_ddrss_sf_tbu_clk:1;
};
struct qcom_pcie {
@@ -1164,7 +1165,7 @@ static int qcom_pcie_get_resources_2_7_0(struct qcom_pcie *pcie)
res->clks[3].id = "bus_slave";
res->clks[4].id = "slave_q2a";
res->clks[5].id = "tbu";
- if (of_device_is_compatible(dev->of_node, "qcom,pcie-sm8250")) {
+ if (pcie->cfg->has_ddrss_sf_tbu_clk) {
res->clks[6].id = "ddrss_sf_tbu";
res->num_clks = 7;
} else {
@@ -1512,6 +1513,7 @@ static const struct qcom_pcie_cfg sdm845_cfg = {
static const struct qcom_pcie_cfg sm8250_cfg = {
.ops = &ops_1_9_0,
+ .has_ddrss_sf_tbu_clk = true,
};
static const struct qcom_pcie_cfg sc7280_cfg = {
--
2.33.0
next prev parent reply other threads:[~2021-12-11 2:18 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-11 2:17 [PATCH v3 00/10] qcom: add support for PCIe0 on SM8450 platform Dmitry Baryshkov
2021-12-11 2:17 ` [PATCH v3 01/10] dt-bindings: pci: qcom: Document PCIe bindings for SM8450 Dmitry Baryshkov
2021-12-11 2:17 ` [PATCH v3 02/10] dt-bindings: phy: qcom,qmp: Add SM8450 PCIe PHY bindings Dmitry Baryshkov
2021-12-11 2:17 ` [PATCH v3 03/10] phy: qcom-qmp: Add SM8450 PCIe0 PHY support Dmitry Baryshkov
2021-12-15 22:36 ` Bjorn Andersson
2021-12-16 1:28 ` Dmitry Baryshkov
2021-12-18 5:17 ` Vinod Koul
2021-12-11 2:17 ` [PATCH v3 04/10] PCI: qcom: Remove redundancy between qcom_pcie and qcom_pcie_cfg Dmitry Baryshkov
2021-12-13 23:24 ` Bjorn Helgaas
2021-12-11 2:17 ` Dmitry Baryshkov [this message]
2021-12-11 2:17 ` [PATCH v3 06/10] PCI: qcom: Add SM8450 PCIe support Dmitry Baryshkov
2021-12-11 2:17 ` [PATCH v3 07/10] arm64: dts: qcom: sm8450: add PCIe0 PHY node Dmitry Baryshkov
2021-12-11 2:17 ` [PATCH v3 08/10] arm64: dts: qcom: sm8450: add PCIe0 RC device Dmitry Baryshkov
2021-12-15 22:35 ` Bjorn Andersson
2021-12-17 1:22 ` Dmitry Baryshkov
2021-12-11 2:17 ` [PATCH v3 09/10] arm64: dts: qcom: sm8450-qrd: enable PCIe0 PHY device Dmitry Baryshkov
2021-12-11 2:17 ` [PATCH v3 10/10] arm64: dts: qcom: sm8450-qrd: enable PCIe0 host Dmitry Baryshkov
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