From: Florian Fainelli <f.fainelli@gmail.com>
To: devicetree@vger.kernel.org
Cc: Florian Fainelli <f.fainelli@gmail.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Rob Herring <robh+dt@kernel.org>, Ray Jui <rjui@broadcom.com>,
Scott Branden <sbranden@broadcom.com>,
bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM IPROC
ARM ARCHITECTURE),
linux-pci@vger.kernel.org (open list:PCI SUBSYSTEM),
linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM
IPROC ARM ARCHITECTURE), linux-kernel@vger.kernel.org (open list)
Subject: [PATCH v6 5/6] dt-bindings: phy: Convert Cygnus PCIe PHY to YAML
Date: Mon, 13 Dec 2021 19:58:19 -0800 [thread overview]
Message-ID: <20211214035820.2984289-6-f.fainelli@gmail.com> (raw)
In-Reply-To: <20211214035820.2984289-1-f.fainelli@gmail.com>
Convert the Broadcom Cygnus PCIe PHY Device Tree binding t YAML to help
with validation.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
.../bindings/phy/brcm,cygnus-pcie-phy.txt | 47 ------------
.../bindings/phy/brcm,cygnus-pcie-phy.yaml | 76 +++++++++++++++++++
2 files changed, 76 insertions(+), 47 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/phy/brcm,cygnus-pcie-phy.txt
create mode 100644 Documentation/devicetree/bindings/phy/brcm,cygnus-pcie-phy.yaml
diff --git a/Documentation/devicetree/bindings/phy/brcm,cygnus-pcie-phy.txt b/Documentation/devicetree/bindings/phy/brcm,cygnus-pcie-phy.txt
deleted file mode 100644
index 10efff28b52b..000000000000
--- a/Documentation/devicetree/bindings/phy/brcm,cygnus-pcie-phy.txt
+++ /dev/null
@@ -1,47 +0,0 @@
-Broadcom Cygnus PCIe PHY
-
-Required properties:
-- compatible: must be "brcm,cygnus-pcie-phy"
-- reg: base address and length of the PCIe PHY block
-- #address-cells: must be 1
-- #size-cells: must be 0
-
-Each PCIe PHY should be represented by a child node
-
-Required properties For the child node:
-- reg: the PHY ID
-0 - PCIe RC 0
-1 - PCIe RC 1
-- #phy-cells: must be 0
-
-Example:
- pcie_phy: phy@301d0a0 {
- compatible = "brcm,cygnus-pcie-phy";
- reg = <0x0301d0a0 0x14>;
-
- pcie0_phy: phy@0 {
- reg = <0>;
- #phy-cells = <0>;
- };
-
- pcie1_phy: phy@1 {
- reg = <1>;
- #phy-cells = <0>;
- };
- };
-
- /* users of the PCIe phy */
-
- pcie0: pcie@18012000 {
- ...
- ...
- phys = <&pcie0_phy>;
- phy-names = "pcie-phy";
- };
-
- pcie1: pcie@18013000 {
- ...
- ...
- phys = <pcie1_phy>;
- phy-names = "pcie-phy";
- };
diff --git a/Documentation/devicetree/bindings/phy/brcm,cygnus-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/brcm,cygnus-pcie-phy.yaml
new file mode 100644
index 000000000000..045699c65779
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/brcm,cygnus-pcie-phy.yaml
@@ -0,0 +1,76 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/brcm,cygnus-pcie-phy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Broadcom Cygnus PCIe PHY
+
+maintainers:
+ - Ray Jui <ray.jui@broadcom.com>
+ - Scott Branden <scott.branden@broadcom.com>
+
+properties:
+ $nodename:
+ pattern: "^pcie[-|_]phy(@.*)?$"
+
+ compatible:
+ items:
+ - const: brcm,cygnus-pcie-phy
+
+ reg:
+ maxItems: 1
+ description: >
+ Base address and length of the PCIe PHY block
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 0
+
+patternProperties:
+ "^pcie-phy@[0-9]+$":
+ type: object
+ description: >
+ PCIe PHY child nodes
+
+ properties:
+ reg:
+ maxItems: 1
+ description: >
+ The PCIe PHY port number
+
+ "#phy-cells":
+ const: 0
+
+ required:
+ - reg
+ - "#phy-cells"
+
+required:
+ - compatible
+ - reg
+ - "#address-cells"
+ - "#size-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ pcie_phy: pcie_phy@301d0a0 {
+ compatible = "brcm,cygnus-pcie-phy";
+ reg = <0x0301d0a0 0x14>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pcie0_phy: pcie-phy@0 {
+ reg = <0>;
+ #phy-cells = <0>;
+ };
+
+ pcie1_phy: pcie-phy@1 {
+ reg = <1>;
+ #phy-cells = <0>;
+ };
+ };
--
2.25.1
next prev parent reply other threads:[~2021-12-14 3:58 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-14 3:58 [PATCH v6 0/6] Convert iProc PCIe binding to YAML Florian Fainelli
2021-12-14 3:58 ` [PATCH v6 1/6] ARM: dts: Cygnus: Fixed iProc PCIe controller properties Florian Fainelli
2021-12-14 3:58 ` [PATCH v6 2/6] ARM: dts: Cygnus: Update PCIe PHY node unit name(s) Florian Fainelli
2021-12-14 3:58 ` [PATCH v6 3/6] ARM: dts: HR2: Fixed iProc PCIe MSI sub-node Florian Fainelli
2021-12-14 3:58 ` [PATCH v6 4/6] ARM: dts: NSP: " Florian Fainelli
2021-12-14 3:58 ` Florian Fainelli [this message]
2021-12-14 16:49 ` [PATCH v6 5/6] dt-bindings: phy: Convert Cygnus PCIe PHY to YAML Rob Herring
2021-12-14 3:58 ` [PATCH v6 6/6] dt-bindings: pci: Convert iProc PCIe " Florian Fainelli
2021-12-14 16:49 ` Rob Herring
2021-12-17 3:35 ` [PATCH v6 0/6] Convert iProc PCIe binding " Florian Fainelli
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