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From: "Pali Rohár" <pali@kernel.org>
To: "Thomas Petazzoni" <thomas.petazzoni@bootlin.com>,
	"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Marek Behún" <kabel@kernel.org>
Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH v2 07/11] PCI: mvebu: Set PCI_BRIDGE_EMUL_NO_IO_FORWARD when IO is unsupported
Date: Tue,  4 Jan 2022 16:35:25 +0100	[thread overview]
Message-ID: <20220104153529.31647-8-pali@kernel.org> (raw)
In-Reply-To: <20220104153529.31647-1-pali@kernel.org>

This will make PCI bridge to return zeros when accessing IO base and limit
registers, as required by PCIe base specification.

This allows to remove adhoc checks around mvebu_pcie_handle_iobase_change()
function for unsupported IO ranges. PCI_BRIDGE_EMUL_NO_IO_FORWARD ensures
that there will be no non-zeros write to IO registers when IO is not
supported.

Signed-off-by: Pali Rohár <pali@kernel.org>
---
 drivers/pci/controller/pci-mvebu.c | 29 ++++++++++-------------------
 1 file changed, 10 insertions(+), 19 deletions(-)

diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c
index 016f709b3067..551f55af5226 100644
--- a/drivers/pci/controller/pci-mvebu.c
+++ b/drivers/pci/controller/pci-mvebu.c
@@ -438,12 +438,6 @@ static int mvebu_pcie_handle_iobase_change(struct mvebu_pcie_port *port)
 		return mvebu_pcie_set_window(port, port->io_target, port->io_attr,
 					     &desired, &port->iowin);
 
-	if (!mvebu_has_ioport(port)) {
-		dev_WARN(&port->pcie->pdev->dev,
-			 "Attempt to set IO when IO is disabled\n");
-		return -EOPNOTSUPP;
-	}
-
 	/*
 	 * We read the PCI-to-PCI bridge emulated registers, and
 	 * calculate the base address and size of the address decoding
@@ -599,24 +593,18 @@ mvebu_pci_bridge_emul_base_conf_write(struct pci_bridge_emul *bridge,
 
 	switch (reg) {
 	case PCI_COMMAND:
-		if (!mvebu_has_ioport(port)) {
-			conf->command = cpu_to_le16(
-				le16_to_cpu(conf->command) & ~PCI_COMMAND_IO);
-			new &= ~PCI_COMMAND_IO;
-		}
-
 		mvebu_writel(port, new, PCIE_CMD_OFF);
 		break;
 
 	case PCI_IO_BASE:
-		if ((mask & 0xffff) && mvebu_pcie_handle_iobase_change(port)) {
+		if ((mask & 0xffff) && mvebu_has_ioport(port) &&
+		    mvebu_pcie_handle_iobase_change(port)) {
 			/* On error disable IO range */
 			conf->iobase &= ~0xf0;
 			conf->iolimit &= ~0xf0;
+			conf->iobase |= 0xf0;
 			conf->iobaseupper = cpu_to_le16(0x0000);
 			conf->iolimitupper = cpu_to_le16(0x0000);
-			if (mvebu_has_ioport(port))
-				conf->iobase |= 0xf0;
 		}
 		break;
 
@@ -630,14 +618,14 @@ mvebu_pci_bridge_emul_base_conf_write(struct pci_bridge_emul *bridge,
 		break;
 
 	case PCI_IO_BASE_UPPER16:
-		if (mvebu_pcie_handle_iobase_change(port)) {
+		if (mvebu_has_ioport(port) &&
+		    mvebu_pcie_handle_iobase_change(port)) {
 			/* On error disable IO range */
 			conf->iobase &= ~0xf0;
 			conf->iolimit &= ~0xf0;
+			conf->iobase |= 0xf0;
 			conf->iobaseupper = cpu_to_le16(0x0000);
 			conf->iolimitupper = cpu_to_le16(0x0000);
-			if (mvebu_has_ioport(port))
-				conf->iobase |= 0xf0;
 		}
 		break;
 
@@ -722,6 +710,7 @@ static const struct pci_bridge_emul_ops mvebu_pci_bridge_emul_ops = {
  */
 static int mvebu_pci_bridge_emul_init(struct mvebu_pcie_port *port)
 {
+	unsigned int bridge_flags = PCI_BRIDGE_EMUL_NO_PREFMEM_FORWARD;
 	struct pci_bridge_emul *bridge = &port->bridge;
 	u32 pcie_cap = mvebu_readl(port, PCIE_CAP_PCIEXP);
 	u8 pcie_cap_ver = ((pcie_cap >> 16) & PCI_EXP_FLAGS_VERS);
@@ -735,6 +724,8 @@ static int mvebu_pci_bridge_emul_init(struct mvebu_pcie_port *port)
 		/* We support 32 bits I/O addressing */
 		bridge->conf.iobase = PCI_IO_RANGE_TYPE_32;
 		bridge->conf.iolimit = PCI_IO_RANGE_TYPE_32;
+	} else {
+		bridge_flags |= PCI_BRIDGE_EMUL_NO_IO_FORWARD;
 	}
 
 	/*
@@ -747,7 +738,7 @@ static int mvebu_pci_bridge_emul_init(struct mvebu_pcie_port *port)
 	bridge->data = port;
 	bridge->ops = &mvebu_pci_bridge_emul_ops;
 
-	return pci_bridge_emul_init(bridge, PCI_BRIDGE_EMUL_NO_PREFMEM_FORWARD);
+	return pci_bridge_emul_init(bridge, bridge_flags);
 }
 
 static inline struct mvebu_pcie *sys_to_pcie(struct pci_sys_data *sys)
-- 
2.20.1


  parent reply	other threads:[~2022-01-04 15:38 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-12-21 14:14 [PATCH 00/11] PCI: Small improvements for pci-bridge-emul and mvebu Pali Rohár
2021-12-21 14:14 ` [PATCH 01/11] MAINTAINERS: Add Pali Rohár as pci-mvebu.c maintainer Pali Rohár
2021-12-21 15:39   ` Thomas Petazzoni
2021-12-21 14:14 ` [PATCH 02/11] PCI: pci-bridge-emul: Make struct pci_bridge_emul_ops as const Pali Rohár
2021-12-21 15:39   ` Thomas Petazzoni
2021-12-21 14:14 ` [PATCH 03/11] PCI: pci-bridge-emul: Rename PCI_BRIDGE_EMUL_NO_PREFETCHABLE_BAR to PCI_BRIDGE_EMUL_NO_PREFMEM_FORWARD Pali Rohár
2021-12-21 15:41   ` Thomas Petazzoni
2021-12-21 14:14 ` [PATCH 04/11] PCI: pci-bridge-emul: Add support for new flag PCI_BRIDGE_EMUL_NO_IO_FORWARD Pali Rohár
2021-12-21 15:42   ` Thomas Petazzoni
2021-12-21 14:14 ` [PATCH 05/11] PCI: mvebu: Add help string for CONFIG_PCI_MVEBU option Pali Rohár
2021-12-21 15:43   ` Thomas Petazzoni
2021-12-21 14:14 ` [PATCH 06/11] PCI: mvebu: Remove duplicate nports assignment Pali Rohár
2021-12-21 15:44   ` Thomas Petazzoni
2021-12-21 14:14 ` [PATCH 07/11] PCI: mvebu: Set PCI_BRIDGE_EMUL_NO_IO_FORWARD when IO is unsupported Pali Rohár
2021-12-21 14:14 ` [PATCH 08/11] PCI: mvebu: Properly initialize vendor, device and revision of emulated bridge Pali Rohár
2021-12-21 14:14 ` [PATCH 09/11] PCI: mvebu: Update comment for PCI_EXP_LNKCAP register on " Pali Rohár
2021-12-21 14:14 ` [PATCH 10/11] PCI: mvebu: Update comment for PCI_EXP_LNKCTL " Pali Rohár
2021-12-21 14:14 ` [PATCH 11/11] PCI: mvebu: Fix reporting Data Link Layer Link Active " Pali Rohár
2022-01-04 15:35 ` [PATCH v2 00/11] PCI: Small improvements for pci-bridge-emul and mvebu Pali Rohár
2022-01-04 15:35   ` [PATCH v2 01/11] MAINTAINERS: Add Pali Rohár as pci-mvebu.c maintainer Pali Rohár
2022-01-04 15:35   ` [PATCH v2 02/11] PCI: pci-bridge-emul: Make struct pci_bridge_emul_ops as const Pali Rohár
2022-01-04 15:35   ` [PATCH v2 03/11] PCI: pci-bridge-emul: Rename PCI_BRIDGE_EMUL_NO_PREFETCHABLE_BAR to PCI_BRIDGE_EMUL_NO_PREFMEM_FORWARD Pali Rohár
2022-01-04 15:35   ` [PATCH v2 04/11] PCI: pci-bridge-emul: Add support for new flag PCI_BRIDGE_EMUL_NO_IO_FORWARD Pali Rohár
2022-01-04 15:35   ` [PATCH v2 05/11] PCI: mvebu: Add help string for CONFIG_PCI_MVEBU option Pali Rohár
2022-01-04 15:35   ` [PATCH v2 06/11] PCI: mvebu: Remove duplicate nports assignment Pali Rohár
2022-01-04 15:35   ` Pali Rohár [this message]
2022-01-04 15:35   ` [PATCH v2 08/11] PCI: mvebu: Properly initialize vendor, device and revision of emulated bridge Pali Rohár
2022-01-04 15:35   ` [PATCH v2 09/11] PCI: mvebu: Update comment for PCI_EXP_LNKCAP register on " Pali Rohár
2022-01-04 15:35   ` [PATCH v2 10/11] PCI: mvebu: Update comment for PCI_EXP_LNKCTL " Pali Rohár
2022-01-04 15:35   ` [PATCH v2 11/11] PCI: mvebu: Fix reporting Data Link Layer Link Active " Pali Rohár
2022-01-20  9:01   ` [PATCH v2 00/11] PCI: Small improvements for pci-bridge-emul and mvebu Pali Rohár
2022-01-20 16:31   ` Rob Herring
2022-02-03 10:56   ` Lorenzo Pieralisi

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