From: "Pali Rohár" <pali@kernel.org>
To: Stefan Roese <sr@denx.de>
Cc: linux-pci@vger.kernel.org,
Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>,
Bjorn Helgaas <helgaas@kernel.org>,
Michal Simek <michal.simek@xilinx.com>
Subject: Re: [PATCH v4 2/2] PCI: xilinx-nwl: Add method to init_platform_service_irqs hook
Date: Fri, 14 Jan 2022 12:48:36 +0100 [thread overview]
Message-ID: <20220114114836.o5pjxsp6rjdemavr@pali> (raw)
In-Reply-To: <20220114075834.1938409-3-sr@denx.de>
On Friday 14 January 2022 08:58:34 Stefan Roese wrote:
> From: Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>
>
> Add nwl_init_platform_service_irqs() hook to init_platform_service_irqs
> to register the platform-specific Service Errors IRQs for this PCIe
> controller to fully support e.g. AER on this platform.
>
> Signed-off-by: Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>
> Signed-off-by: Stefan Roese <sr@denx.de>
> Cc: Bjorn Helgaas <helgaas@kernel.org>
> Cc: Pali Rohár <pali@kernel.org>
> Cc: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Pali Rohár <pali@kernel.org>
> ---
> drivers/pci/controller/pcie-xilinx-nwl.c | 18 ++++++++++++++++++
> 1 file changed, 18 insertions(+)
>
> diff --git a/drivers/pci/controller/pcie-xilinx-nwl.c b/drivers/pci/controller/pcie-xilinx-nwl.c
> index 414b679175b3..540536bbe3f8 100644
> --- a/drivers/pci/controller/pcie-xilinx-nwl.c
> +++ b/drivers/pci/controller/pcie-xilinx-nwl.c
> @@ -24,6 +24,7 @@
> #include <linux/irqchip/chained_irq.h>
>
> #include "../pci.h"
> +#include "../pcie/portdrv.h"
>
> /* Bridge core config registers */
> #define BRCFG_PCIE_RX0 0x00000000
> @@ -806,6 +807,22 @@ static int nwl_pcie_parse_dt(struct nwl_pcie *pcie,
> return 0;
> }
>
> +static int nwl_init_platform_service_irqs(struct pci_dev *dev, int *irqs,
> + int plat_mask)
> +{
> + struct pci_host_bridge *bridge;
> + struct nwl_pcie *pcie;
> +
> + bridge = pci_find_host_bridge(dev->bus);
> + pcie = pci_host_bridge_priv(bridge);
> + if (plat_mask & PCIE_PORT_SERVICE_AER) {
> + irqs[PCIE_PORT_SERVICE_AER_SHIFT] = pcie->irq_misc;
> + return 0; /* platform-specific service IRQ installed */
> + }
Just I want to be sure, with this change PME and HP interrupts are not
provided even when plat_mask argument contains them.
> +
> + return -ENODEV; /* platform-specific service IRQ not installed */
> +}
> +
> static const struct of_device_id nwl_pcie_of_match[] = {
> { .compatible = "xlnx,nwl-pcie-2.11", },
> {}
> @@ -857,6 +874,7 @@ static int nwl_pcie_probe(struct platform_device *pdev)
>
> bridge->sysdata = pcie;
> bridge->ops = &nwl_pcie_ops;
> + bridge->init_platform_service_irqs = nwl_init_platform_service_irqs;
>
> if (IS_ENABLED(CONFIG_PCI_MSI)) {
> err = nwl_pcie_enable_msi(pcie);
> --
> 2.34.1
>
next prev parent reply other threads:[~2022-01-14 11:48 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-14 7:58 [PATCH v4 0/2] Add support to register platform service IRQ Stefan Roese
2022-01-14 7:58 ` [PATCH v4 1/2] PCI/portdrv: Add option to setup IRQs for platform-specific Service Errors Stefan Roese
2022-01-14 11:46 ` Pali Rohár
2022-05-28 0:09 ` Bjorn Helgaas
2022-05-30 8:18 ` Stefan Roese
2022-05-30 8:32 ` Pali Rohár
2022-05-31 21:31 ` Bjorn Helgaas
2022-05-31 22:57 ` Pali Rohár
2022-06-01 11:47 ` Stefan Roese
2022-06-01 11:53 ` Pali Rohár
2022-06-08 18:39 ` Bjorn Helgaas
2022-01-14 7:58 ` [PATCH v4 2/2] PCI: xilinx-nwl: Add method to init_platform_service_irqs hook Stefan Roese
2022-01-14 11:48 ` Pali Rohár [this message]
2022-01-14 12:13 ` Stefan Roese
2022-01-14 12:34 ` Pali Rohár
2022-01-14 17:03 ` Stefan Roese
2022-03-24 16:52 ` [PATCH v4 0/2] Add support to register platform service IRQ Stefan Roese
2022-03-31 15:30 ` Bjorn Helgaas
2022-04-01 6:28 ` Stefan Roese
2022-04-01 12:35 ` Bjorn Helgaas
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