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From: Bjorn Helgaas <helgaas@kernel.org>
To: Zhi Li <lznuaa@gmail.com>
Cc: Frank Li <Frank.Li@nxp.com>,
	gustavo.pimentel@synopsys.com, hongxing.zhu@nxp.com,
	Lucas Stach <l.stach@pengutronix.de>,
	dl-linux-imx <linux-imx@nxp.com>,
	linux-pci@vger.kernel.org, vkoul@kernel.org,
	lorenzo.pieralisi@arm.com, robh@kernel.org, kw@linux.com,
	Bjorn Helgaas <bhelgaas@google.com>,
	Shawn Guo <shawnguo@kernel.org>,
	Jingoo Han <jingoohan1@gmail.com>
Subject: Re: [PATCH 4/5] PCI: imx6: add PCIe embedded DMA support
Date: Thu, 3 Mar 2022 11:48:26 -0600	[thread overview]
Message-ID: <20220303174826.GA815663@bhelgaas> (raw)
In-Reply-To: <CAHrpEqSBLMU-RO8moqvSQUcP62N7xqpNyHfH1UERB_qAByK+2Q@mail.gmail.com>

On Wed, Mar 02, 2022 at 03:28:48PM -0600, Zhi Li wrote:
> On Wed, Mar 2, 2022 at 3:21 PM Bjorn Helgaas <helgaas@kernel.org> wrote:
> > On Wed, Mar 02, 2022 at 02:49:45PM -0600, Zhi Li wrote:
> > > On Wed, Mar 2, 2022 at 2:15 PM Bjorn Helgaas <helgaas@kernel.org> wrote:
> > > > On Tue, Mar 01, 2022 at 09:26:45PM -0600, Frank Li wrote:
> > > > > ...

> > > > > The DMA can transfer data to any remote address location
> > > > > regardless PCI address space size.
> > > >
> > > > What is this sentence telling us?  Is it merely that the DMA "inbound
> > > > address space" may be larger than the MMIO "outbound address space"?
> > > > I think there's no necessary connection between them, and there's no
> > > > need to call it out as though it's something special.
> > >
> > > There are outbound address windows. such as 256M, but RC sides have more
> > > than 256M ddr memory, such as 16GB. If CPU or external DMA controller,
> > > only can access 256M
> > > address space.
> > >
> > > But if using an embedded DMA controller,  it can access the whole RC's
> > > 16G address without
> > > changing iAtu mapping.
> > >
> > > I want to say why I need enable embedded DMA for EP.
> >
> > OK, so if IIUC, the DMA controller is embedded in the imx6 host bridge
> > (of course; that's obvious from what you're doing here).  And unlike
> > DMA from devices *below* the host bridge, DMAs from the embedded
> > controller don't go through the iATU, so they are not subject to any
> > of the iATU limitations.  Right?
> 
> Yes!

I guess that means the DMA controller is functionally and logically
sort of a separate device from the PCI host bridge?  Sounds like the
DMA controller doesn't receive or generate PCI transactions?

Bjorn

  reply	other threads:[~2022-03-03 17:48 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-02  3:26 [PATCH 1/5] dmaengine: dw-edma: fix dw_edma_probe() can't be call globally Frank Li
2022-03-02  3:26 ` [PATCH 2/5] dmaengine: dw-edma-pcie: don't touch internal struct dw_edma Frank Li
2022-03-03  9:56   ` Manivannan Sadhasivam
2022-03-02  3:26 ` [PATCH 3/5] dmaengine: dw-edma: add flags at struct dw_edma_chip Frank Li
2022-03-02  3:26 ` [PATCH 4/5] PCI: imx6: add PCIe embedded DMA support Frank Li
2022-03-02 20:15   ` Bjorn Helgaas
2022-03-02 20:49     ` Zhi Li
2022-03-02 21:21       ` Bjorn Helgaas
2022-03-02 21:28         ` Zhi Li
2022-03-03 17:48           ` Bjorn Helgaas [this message]
2022-03-03 18:00             ` Zhi Li
2022-03-02  3:26 ` [PATCH 5/5] PCI: endpoint: functions/pci-epf-test: Support PCI controller DMA Frank Li
2022-03-03  9:42 ` [PATCH 1/5] dmaengine: dw-edma: fix dw_edma_probe() can't be call globally Manivannan Sadhasivam
2022-03-03 10:05 ` Manivannan Sadhasivam

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