From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8FE3FC433FE for ; Sat, 23 Apr 2022 12:14:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235066AbiDWMRT (ORCPT ); Sat, 23 Apr 2022 08:17:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52286 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231537AbiDWMRS (ORCPT ); Sat, 23 Apr 2022 08:17:18 -0400 Received: from mail-pg1-x529.google.com (mail-pg1-x529.google.com [IPv6:2607:f8b0:4864:20::529]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EE7EB229EDD for ; Sat, 23 Apr 2022 05:14:21 -0700 (PDT) Received: by mail-pg1-x529.google.com with SMTP id t13so9464871pgn.8 for ; Sat, 23 Apr 2022 05:14:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=wJj7CRzeQgE5tU5JZGymolaecplxB4hWP4O6I045pqI=; b=rc2SJEkpHSb6uBkYOelbKAcnEqdrj8wpDnrU2+3Kfoy2B/lQAZ6aopjx4po7+0lNYE BtEq66ekhn9nH0l3YoeU2x+HDXsNzaCqUy51nGRciYtFOFw6U2vjM45eG2VmNiF9MLWg nWOeljcV/bze/cTa4Yh4RYy+rdlhUlpkMVG2f+ASFQmx0KBragR05NLgI3N/8NaqSgFX /J+hMYuErSzxOZ0772vsWN/4vPL9f9puv6saH/5H1dvqaogrsky6Hak6OuOyRGL7QUxp C+fonwaimTMScZjZG8t+myTPv5HkMxxAzguHP1uknfT0nptWCzEQp+8AhLYpCBRRcUW3 277Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=wJj7CRzeQgE5tU5JZGymolaecplxB4hWP4O6I045pqI=; b=xi/kRpiMczdT8N1+p/LwsKc/9eFQlES1ddzoSqIevIKpROIL/9MZUHDc3pLorgp+bX 4L7SS6naOTLQ1RJjVRx9mQdwuW78IJC0HkeVyd7rryNh5JTHSKZpxLF17ip0DwBkQVw0 l0EpdSxQz8Bt/EPQnBLTkh626PRa/m6V+Fi8v3mNVp5sYCuhLeKDQw4d0x+4DJApqi9m 2E2wz7xml/JICg/nMEDjGXEf+Ticj5+fbopAEzbAWZMaC5Cyvknlfp8WiGnXZAWOXl7y b/chHh1GPAcIuW6H6ZOao+YsXGdKyJG2O104vS/VyYFH8u1OpOqHztZIk1Hic+NnM7kX d7NA== X-Gm-Message-State: AOAM532J7mkXzGOTv9cXK6fHlKDlX44BJtkVVaG5M4cy+MkA+7YRJoQn tzT1Ae/gxId+gk+7h+D7lpgz X-Google-Smtp-Source: ABdhPJyarlF3Uxl8Gs20s4rXeUO6b/id05Lpnny73hQNPTL59D01YXVMe9z5gWNEiuDkVfvrB2bxhQ== X-Received: by 2002:a05:6a00:2186:b0:4f7:5544:1cc9 with SMTP id h6-20020a056a00218600b004f755441cc9mr9557217pfi.62.1650716061434; Sat, 23 Apr 2022 05:14:21 -0700 (PDT) Received: from thinkpad ([117.207.28.196]) by smtp.gmail.com with ESMTPSA id h13-20020a056a00230d00b004f427ffd485sm6351128pfh.143.2022.04.23.05.14.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 23 Apr 2022 05:14:20 -0700 (PDT) Date: Sat, 23 Apr 2022 17:44:13 +0530 From: Manivannan Sadhasivam To: Frank Li Cc: gustavo.pimentel@synopsys.com, hongxing.zhu@nxp.com, l.stach@pengutronix.de, linux-imx@nxp.com, linux-pci@vger.kernel.org, dmaengine@vger.kernel.org, fancer.lancer@gmail.com, lznuaa@gmail.com, helgaas@kernel.org, vkoul@kernel.org, lorenzo.pieralisi@arm.com, robh@kernel.org, kw@linux.com, bhelgaas@google.com, Sergey.Semin@baikalelectronics.ru Subject: Re: [PATCH v9 7/9] dmaengine: dw-edma: Add support for chip specific flags Message-ID: <20220423121413.GH374560@thinkpad> References: <20220422143643.727871-1-Frank.Li@nxp.com> <20220422143643.727871-8-Frank.Li@nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220422143643.727871-8-Frank.Li@nxp.com> Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org On Fri, Apr 22, 2022 at 09:36:41AM -0500, Frank Li wrote: > Add a "flags" field to the "struct dw_edma_chip" so that the controller > drivers can pass flags that are relevant to the platform. > > DW_EDMA_CHIP_LOCAL - Used by the controller drivers accessing eDMA > locally. Local eDMA access doesn't require generating MSIs to the remote. > > Signed-off-by: Frank Li > Reviewed-by: Serge Semin Reviewed-by: Manivannan Sadhasivam Thanks, Mani > --- > Change from v7 to v9 > -none > Change from v6 to v7 > - dw_edma_chip_flags to u32 > Change from v5 to v6 > - use enum instead of define > > Change from v4 to v5 > - split two two patch > - rework commit message > Change from v3 to v4 > none > Change from v2 to v3 > - rework commit message > - Change to DW_EDMA_CHIP_32BIT_DBI > - using DW_EDMA_CHIP_LOCAL control msi > - Apply Bjorn's comments, > if (!j) { > control |= DW_EDMA_V0_LIE; > if (!(chan->chip->flags & DW_EDMA_CHIP_LOCAL)) > control |= DW_EDMA_V0_RIE; > } > > if ((chan->chip->flags & DW_EDMA_CHIP_REG32BIT) || > !IS_ENABLED(CONFIG_64BIT)) { > SET_CH_32(...); > SET_CH_32(...); > } else { > SET_CH_64(...); > } > > > Change from v1 to v2 > - none > > drivers/dma/dw-edma/dw-edma-v0-core.c | 9 ++++++--- > include/linux/dma/edma.h | 10 ++++++++++ > 2 files changed, 16 insertions(+), 3 deletions(-) > > diff --git a/drivers/dma/dw-edma/dw-edma-v0-core.c b/drivers/dma/dw-edma/dw-edma-v0-core.c > index c59e23b9f9fdb..2ab1059a3de1e 100644 > --- a/drivers/dma/dw-edma/dw-edma-v0-core.c > +++ b/drivers/dma/dw-edma/dw-edma-v0-core.c > @@ -301,6 +301,7 @@ u32 dw_edma_v0_core_status_abort_int(struct dw_edma *dw, enum dw_edma_dir dir) > static void dw_edma_v0_core_write_chunk(struct dw_edma_chunk *chunk) > { > struct dw_edma_burst *child; > + struct dw_edma_chan *chan = chunk->chan; > struct dw_edma_v0_lli __iomem *lli; > struct dw_edma_v0_llp __iomem *llp; > u32 control = 0, i = 0; > @@ -314,9 +315,11 @@ static void dw_edma_v0_core_write_chunk(struct dw_edma_chunk *chunk) > j = chunk->bursts_alloc; > list_for_each_entry(child, &chunk->burst->list, list) { > j--; > - if (!j) > - control |= (DW_EDMA_V0_LIE | DW_EDMA_V0_RIE); > - > + if (!j) { > + control |= DW_EDMA_V0_LIE; > + if (!(chan->dw->chip->flags & DW_EDMA_CHIP_LOCAL)) > + control |= DW_EDMA_V0_RIE; > + } > /* Channel control */ > SET_LL_32(&lli[i].control, control); > /* Transfer size */ > diff --git a/include/linux/dma/edma.h b/include/linux/dma/edma.h > index c2039246fc08c..fbd05a7284934 100644 > --- a/include/linux/dma/edma.h > +++ b/include/linux/dma/edma.h > @@ -33,12 +33,21 @@ enum dw_edma_map_format { > EDMA_MF_HDMA_COMPAT = 0x5 > }; > > +/** > + * enum dw_edma_chip_flags - Flags specific to an eDMA chip > + * @DW_EDMA_CHIP_LOCAL: eDMA is used locally by an endpoint > + */ > +enum dw_edma_chip_flags { > + DW_EDMA_CHIP_LOCAL = BIT(0), > +}; > + > /** > * struct dw_edma_chip - representation of DesignWare eDMA controller hardware > * @dev: struct device of the eDMA controller > * @id: instance ID > * @nr_irqs: total dma irq number > * @ops DMA channel to IRQ number mapping > + * @flags dw_edma_chip_flags > * @reg_base DMA register base address > * @ll_wr_cnt DMA write link list number > * @ll_rd_cnt DMA read link list number > @@ -53,6 +62,7 @@ struct dw_edma_chip { > int id; > int nr_irqs; > const struct dw_edma_core_ops *ops; > + u32 flags; > > void __iomem *reg_base; > > -- > 2.35.1 >