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From: Serge Semin <>
To: "Jingoo Han" <>,
	"Gustavo Pimentel" <>,
	"Bjorn Helgaas" <>,
	"Lorenzo Pieralisi" <>,
	"Rob Herring" <>,
	"Krzysztof Wilczyński" <>
Cc: Serge Semin <>,
	Serge Semin <>,
	Alexey Malahov <>,
	Pavel Parkhomenko <>,
	Frank Li <>,
	Manivannan Sadhasivam <>,
	<>, <>
Subject: [PATCH v2 02/13] PCI: dwc: Don't use generic IO-ops for DBI-space access
Date: Wed, 4 May 2022 00:22:49 +0300	[thread overview]
Message-ID: <> (raw)
In-Reply-To: <>

Commit c2b0c098fbd1 ("PCI: dwc: Use generic config accessors") replaced
the locally defined DW PCIe host controller config-space accessors with
the generic methods pci_generic_config_read() and
pci_generic_config_write(). It was intended that the corresponding
bus-mapping callback returned a correct virtual address of the passed PCI
config-space register. The problem of the proposed solution was that it
didn't take into account the way the host config-space is accessed on the
DW PCIe. Depending on the DW PCIe IP-core synthesize parameters different
interfaces can be used to access the host and peripheral config/memory
spaces. The former one can be accessed via the DBI interface, while the
later ones is reached via the AHB/AXI application bus. In case if the DW
PCIe controller is configured to have a dedicated DBI interface, the way
it is mapped into the IO-memory turns to be platform-specific. For such
setups the DWC PCIe driver provides a set of the callbacks
dw_pcie_ops.{read_dbi,write_dbi} so the platforms glue-drivers would be
able to take into account the DBI bus IO peculiarities. Since
commit c2b0c098fbd1 ("PCI: dwc: Use generic config accessors") these
methods haven't been utilized during the generic host initialization
performed by the PCIe subsystem code.

I don't really know how come there have been no problems spotted for the
Histb/Exynos/Kirin PCIe controllers so far, but in our case with dword
aligned IO requirement the generic config-space accessors can't be
utilized for the host config-space. Thus in order to make sure the host
config-space is properly accessed via the DBI bus let's get back the
dw_pcie_rd_own_conf() and dw_pcie_wr_own_conf() methods. They are going to
be just wrappers around the already defined
dw_pcie_read_dbi()/dw_pcie_write_dbi() functions with proper arguments
conversion. These methods perform the platform-specific config-space IO if
the DBI accessors are specified, otherwise they call normal MMIO

Fixes: c2b0c098fbd1 ("PCI: dwc: Use generic config accessors")
Signed-off-by: Serge Semin <>
 .../pci/controller/dwc/pcie-designware-host.c | 34 +++++++++++++++++--
 1 file changed, 32 insertions(+), 2 deletions(-)

diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
index 7403b1709726..a250869334a5 100644
--- a/drivers/pci/controller/dwc/pcie-designware-host.c
+++ b/drivers/pci/controller/dwc/pcie-designware-host.c
@@ -534,10 +534,40 @@ void __iomem *dw_pcie_own_conf_map_bus(struct pci_bus *bus, unsigned int devfn,
+static int dw_pcie_rd_own_conf(struct pci_bus *bus, unsigned int devfn,
+			       int where, int size, u32 *val)
+	struct pcie_port *pp = bus->sysdata;
+	struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
+	if (PCI_SLOT(devfn) > 0) {
+		*val = ~0U;
+	}
+	*val = dw_pcie_read_dbi(pci, where, size);
+static int dw_pcie_wr_own_conf(struct pci_bus *bus, unsigned int devfn,
+			       int where, int size, u32 val)
+	struct pcie_port *pp = bus->sysdata;
+	struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
+	if (PCI_SLOT(devfn) > 0)
+	dw_pcie_write_dbi(pci, where, size, val);
 static struct pci_ops dw_pcie_ops = {
 	.map_bus = dw_pcie_own_conf_map_bus,
-	.read = pci_generic_config_read,
-	.write = pci_generic_config_write,
+	.read = dw_pcie_rd_own_conf,
+	.write = dw_pcie_wr_own_conf,
 void dw_pcie_setup_rc(struct pcie_port *pp)

  parent reply	other threads:[~2022-05-03 21:23 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-03 21:22 [PATCH v2 00/13] PCI: dwc: Various fixes and cleanups Serge Semin
2022-05-03 21:22 ` [PATCH v2 01/13] PCI: dwc: Stop link in the host init error and de-initialization Serge Semin
2022-05-03 21:22 ` Serge Semin [this message]
2022-05-03 21:22 ` [PATCH v2 03/13] PCI: dwc: Add unroll iATU space support to the regions disable method Serge Semin
2022-05-04  4:01   ` kernel test robot
2022-05-03 21:22 ` [PATCH v2 04/13] PCI: dwc: Disable outbound windows for controllers with iATU Serge Semin
2022-05-03 21:22 ` [PATCH v2 05/13] PCI: dwc: Set INCREASE_REGION_SIZE flag based on limit address Serge Semin
2022-05-03 21:22 ` [PATCH v2 06/13] PCI: dwc: Add braces to the multi-line if-else statements Serge Semin
2022-05-03 21:22 ` [PATCH v2 07/13] PCI: dwc: Add trailing new-line literals to the log messages Serge Semin
2022-05-03 21:22 ` [PATCH v2 08/13] PCI: dwc: Discard IP-core version checking on unrolled iATU detection Serge Semin
2022-05-03 21:22 ` [PATCH v2 09/13] PCI: dwc: Convert Link-up status method to using dw_pcie_readl_dbi() Serge Semin
2022-05-03 21:22 ` [PATCH v2 10/13] PCI: dwc: Deallocate EPC memory on EP init error Serge Semin
2022-05-03 21:22 ` [PATCH v2 11/13] PCI: dwc-plat: Simplify the probe method return value handling Serge Semin
2022-05-03 21:22 ` [PATCH v2 12/13] PCI: dwc-plat: Discard unused regmap pointer Serge Semin
2022-05-03 21:23 ` [PATCH v2 13/13] PCI: dwc-plat: Drop dw_plat_pcie_of_match forward declaration Serge Semin
2022-05-12 21:41 ` [PATCH v2 00/13] PCI: dwc: Various fixes and cleanups Lorenzo Pieralisi
2022-05-12 23:20   ` Serge Semin
2022-05-13  8:49     ` Lorenzo Pieralisi
2022-05-13 16:50       ` Serge Semin

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