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Thu, 12 May 2022 10:12:00 -0700 (PDT) Received: from thinkpad ([117.202.184.202]) by smtp.gmail.com with ESMTPSA id f18-20020a170902ce9200b0015e8ddeac5dsm125155plg.252.2022.05.12.10.11.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 May 2022 10:11:59 -0700 (PDT) Date: Thu, 12 May 2022 22:41:50 +0530 From: Manivannan Sadhasivam To: Lorenzo Pieralisi Cc: Serge Semin , Jingoo Han , Gustavo Pimentel , Stephen Boyd , Philipp Zabel , Michael Turquette , Bjorn Helgaas , Alexey Malahov , Pavel Parkhomenko , Rob Herring , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Thomas Bogendoerfer , linux-clk@vger.kernel.org, linux-pci@vger.kernel.org, linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v3 0/4] clk: Baikal-T1 DDR/PCIe resets and some xGMAC fixes Message-ID: <20220512171150.GA164627@thinkpad> References: <20220503205722.24755-1-Sergey.Semin@baikalelectronics.ru> <20220512001156.x6kqyhi3vjjpqch6@mobilestation> <20220512152705.GA2506@lpieralisi> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20220512152705.GA2506@lpieralisi> Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org On Thu, May 12, 2022 at 04:27:05PM +0100, Lorenzo Pieralisi wrote: > On Thu, May 12, 2022 at 03:11:56AM +0300, Serge Semin wrote: > > On Tue, May 03, 2022 at 11:57:18PM +0300, Serge Semin wrote: > > > This patchset is an initial one in the series created in the framework > > > of my Baikal-T1 PCIe/eDMA-related work: > > > > > > [1: In-progress v3] clk: Baikal-T1 DDR/PCIe resets and some xGMAC fixes > > > Link: https://lore.kernel.org/linux-pci/20220330144320.27039-1-Sergey.Semin@baikalelectronics.ru/ > > > [2: In-progress v1] PCI: dwc: Various fixes and cleanups > > > Link: https://lore.kernel.org/linux-pci/20220324012524.16784-1-Sergey.Semin@baikalelectronics.ru/ > > > [3: In-progress v1] PCI: dwc: Add dma-ranges/YAML-schema/Baikal-T1 support > > > Link: https://lore.kernel.org/linux-pci/20220324013734.18234-1-Sergey.Semin@baikalelectronics.ru/ > > > [4: In-progress v1] dmaengine: dw-edma: Add RP/EP local DMA controllers support > > > Link: https://lore.kernel.org/linux-pci/20220324014836.19149-1-Sergey.Semin@baikalelectronics.ru/ > > > > > > Since some of the patches in the later patchsets depend on the > > > modifications introduced here, @Lorenzo could you please merge this series > > > through your PCIe subsystem repo? After getting all the required ack'es of > > > course. > > > > > > Short summary regarding this patchset. A few more modifications are > > > introduced here to finally finish the Baikal-T1 CCU unit support up and > > > prepare the code before adding the Baikal-T1 PCIe/xGMAC support. First of > > > all it turned out I specified wrong DW xGMAC PTP reference clock divider > > > in my initial patches. It must be 8, not 10. Secondly I was wrong to add a > > > joint xGMAC Ref and PTP clock instead of having them separately defined. > > > The SoC manual describes these clocks as separate fixed clock wrappers. > > > Finally in order to close the SoC clock/reset support up we need to add > > > the DDR and PCIe interfaces reset controls support. It's done in two > > > steps. First I've moved the reset-controls-related code into a dedicated > > > module. Then the DDR/PCIe reset-control functionality is added. > > > > > > Link: https://lore.kernel.org/linux-pci/20220324010905.15589-1-Sergey.Semin@baikalelectronics.ru/ > > > Changelog v2: > > > - Resubmit the series with adding @Philipp to the list of the recipients. > > > > > > Link: https://lore.kernel.org/linux-pci/20220330144320.27039-1-Sergey.Semin@baikalelectronics.ru/ > > > Changelog v3: > > > - Rebased from v5.17 onto v5.18-rc3. > > > - No comments. Just resend the series. > > > > No comments for more than a week. There were no comments in v1 and v2 > > either. Please at least ack or merge in the series. It would be very > > appreciated to merge it in through one repo with the rest of the > > patchsets before the next merge window. @Bjorn, @Lorenzo, @Michael? > > Hi Sergey, > > these changes affect the clock tree and have to be reviewed and merged > by the respective maintainers if they think the changes can be accepted. > > I don't see any reason why we should, if ACK'ed, take them in the PCI > tree, this series does not apply changes to the PCI tree at all and you > don't need it as a base for future to-be-merged PCI patches either. > > So in short, this series has to go through the usual clock tree review > process. > Yes, Stephen should be the one taking these patches through the clk tree. Also, there is no need to club both pci and clk patches in a single tree. That's usually done for patches with build dependencies, but here there are none. Thanks, Mani > Thanks, > Lorenzo > > > -Sergey > > > > > > > > Signed-off-by: Serge Semin > > > Cc: Alexey Malahov > > > Cc: Pavel Parkhomenko > > > Cc: Rob Herring > > > Cc: "Krzysztof Wilczyński" > > > Cc: Bjorn Helgaas > > > Cc: Thomas Bogendoerfer > > > Cc: linux-clk@vger.kernel.org > > > Cc: linux-pci@vger.kernel.org > > > Cc: linux-mips@vger.kernel.org > > > Cc: linux-kernel@vger.kernel.org > > > > > > Serge Semin (4): > > > clk: baikal-t1: Fix invalid xGMAC PTP clock divider > > > clk: baikal-t1: Define shared xGMAC ref/ptp clocks parent > > > clk: baikal-t1: Move reset-controls code into a dedicated module > > > clk: baikal-t1: Add DDR/PCIe directly controlled resets support > > > > > > drivers/clk/baikal-t1/Kconfig | 12 +- > > > drivers/clk/baikal-t1/Makefile | 1 + > > > drivers/clk/baikal-t1/ccu-div.c | 1 + > > > drivers/clk/baikal-t1/ccu-div.h | 6 + > > > drivers/clk/baikal-t1/ccu-rst.c | 373 ++++++++++++++++++++++++++++ > > > drivers/clk/baikal-t1/ccu-rst.h | 64 +++++ > > > drivers/clk/baikal-t1/clk-ccu-div.c | 102 ++------ > > > include/dt-bindings/reset/bt1-ccu.h | 9 + > > > 8 files changed, 482 insertions(+), 86 deletions(-) > > > create mode 100644 drivers/clk/baikal-t1/ccu-rst.c > > > create mode 100644 drivers/clk/baikal-t1/ccu-rst.h > > > > > > -- > > > 2.35.1 > > > -- மணிவண்ணன் சதாசிவம்