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From: Rob Herring <robh@kernel.org>
To: "Pali Rohár" <pali@kernel.org>
Cc: "Thomas Gleixner" <tglx@linutronix.de>,
	"Marc Zyngier" <maz@kernel.org>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Andrew Lunn" <andrew@lunn.ch>,
	"Gregory Clement" <gregory.clement@bootlin.com>,
	"Sebastian Hesselbarth" <sebastian.hesselbarth@gmail.com>,
	"Thomas Petazzoni" <thomas.petazzoni@bootlin.com>,
	"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Marek Behún" <kabel@kernel.org>,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 1/6] dt-bindings: irqchip: armada-370-xp: Update information about MPIC SoC Error
Date: Mon, 16 May 2022 19:18:17 -0500	[thread overview]
Message-ID: <20220517001817.GA3629501-robh@kernel.org> (raw)
In-Reply-To: <20220506134029.21470-2-pali@kernel.org>

On Fri, May 06, 2022 at 03:40:24PM +0200, Pali Rohár wrote:
> Signed-off-by: Pali Rohár <pali@kernel.org>

Why do we need/want this change?

> ---
>  .../interrupt-controller/marvell,armada-370-xp-mpic.txt  | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/marvell,armada-370-xp-mpic.txt b/Documentation/devicetree/bindings/interrupt-controller/marvell,armada-370-xp-mpic.txt
> index 5fc03134a999..8cddbc16ddbd 100644
> --- a/Documentation/devicetree/bindings/interrupt-controller/marvell,armada-370-xp-mpic.txt
> +++ b/Documentation/devicetree/bindings/interrupt-controller/marvell,armada-370-xp-mpic.txt
> @@ -24,6 +24,11 @@ Optional properties:
>    connected as a slave to the Cortex-A9 GIC. The provided interrupt
>    indicate to which GIC interrupt the MPIC output is connected.
>  
> +Optional subnodes:
> +
> +- interrupt-controller@20 with interrupt-controller property for
> +  MPIC SoC Error IRQ controller
> +
>  Example:
>  
>          mpic: interrupt-controller@d0020000 {
> @@ -35,4 +40,8 @@ Example:
>                msi-controller;
>                reg = <0xd0020a00 0x1d0>,
>                      <0xd0021070 0x58>;
> +              soc_err: interrupt-controller@20 {

unit address without 'reg' is an error.

> +                    interrupt-controller;
> +                    #interrupt-cells = <1>;
> +              };
>          };
> -- 
> 2.20.1
> 
> 

  reply	other threads:[~2022-05-17  0:18 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-06 13:40 [PATCH 0/6] PCI: mvebu: Add support for PME and AER interrupts Pali Rohár
2022-05-06 13:40 ` [PATCH 1/6] dt-bindings: irqchip: armada-370-xp: Update information about MPIC SoC Error Pali Rohár
2022-05-17  0:18   ` Rob Herring [this message]
2022-05-06 13:40 ` [PATCH 2/6] irqchip/armada-370-xp: Implement SoC Error interrupts Pali Rohár
2022-05-06 18:19   ` Marc Zyngier
2022-05-06 18:30     ` Pali Rohár
2022-05-06 18:47       ` Marc Zyngier
2022-05-06 18:55         ` Pali Rohár
2022-05-07  9:01           ` Marc Zyngier
2022-05-07  9:20             ` Pali Rohár
2022-05-07  9:42               ` Marc Zyngier
2022-05-07 11:15                 ` Pali Rohár
2022-05-09 23:12               ` Rob Herring
2022-05-09  8:51           ` Thomas Gleixner
2022-05-06 13:40 ` [PATCH 3/6] ARM: dts: armada-38x.dtsi: Add node for MPIC SoC Error IRQ controller Pali Rohár
2022-05-06 13:40 ` [PATCH 4/6] dt-bindings: PCI: mvebu: Update information about summary interrupt Pali Rohár
2022-05-06 13:40 ` [PATCH 5/6] PCI: mvebu: Implement support for interrupts on emulated bridge Pali Rohár
2022-05-06 13:40 ` [PATCH 6/6] ARM: dts: armada-385.dtsi: Add definitions for PCIe summary interrupts Pali Rohár
2022-05-06 14:22 ` [PATCH 0/6] PCI: mvebu: Add support for PME and AER interrupts Pali Rohár

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