From: Alex Williamson <alex.williamson@redhat.com>
To: Abhishek Sahu <abhsahu@nvidia.com>
Cc: Cornelia Huck <cohuck@redhat.com>,
Yishai Hadas <yishaih@nvidia.com>,
Jason Gunthorpe <jgg@nvidia.com>,
Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>,
Kevin Tian <kevin.tian@intel.com>,
"Rafael J . Wysocki" <rafael@kernel.org>,
Max Gurtovoy <mgurtovoy@nvidia.com>,
Bjorn Helgaas <bhelgaas@google.com>,
<linux-kernel@vger.kernel.org>, <kvm@vger.kernel.org>,
<linux-pm@vger.kernel.org>, <linux-pci@vger.kernel.org>
Subject: Re: [PATCH v4 4/4] vfio/pci: Move the unused device into low power state with runtime PM
Date: Tue, 17 May 2022 14:55:39 -0600 [thread overview]
Message-ID: <20220517145539.7265b41a.alex.williamson@redhat.com> (raw)
In-Reply-To: <20220517144256.15991375.alex.williamson@redhat.com>
On Tue, 17 May 2022 14:42:56 -0600
Alex Williamson <alex.williamson@redhat.com> wrote:
> On Tue, 17 May 2022 15:32:19 +0530
> Abhishek Sahu <abhsahu@nvidia.com> wrote:
> > 5. Since the runtime PM framework will provide the same functionality,
> > so directly writing into PCI PM config register can be replaced with
> > the use of runtime PM routines. Also, the use of runtime PM can help
> > us in more power saving.
> >
> > In the systems which do not support D3cold,
> >
> > With the existing implementation:
> >
> > // PCI device
> > # cat /sys/bus/pci/devices/0000\:01\:00.0/power_state
> > D3hot
> > // upstream bridge
> > # cat /sys/bus/pci/devices/0000\:00\:01.0/power_state
> > D0
> >
> > With runtime PM:
> >
> > // PCI device
> > # cat /sys/bus/pci/devices/0000\:01\:00.0/power_state
> > D3hot
> > // upstream bridge
> > # cat /sys/bus/pci/devices/0000\:00\:01.0/power_state
> > D3hot
>
> I'm not able to reproduce these results. Output below abridged:
>
> # lspci -t
> -[0000:00]-+-00.0
> +-01.0-[01]--+-00.0
> | \-00.1
>
> # grep . /sys/bus/pci/devices/*/power_state
> /sys/bus/pci/devices/0000:00:01.0/power_state:D0
> /sys/bus/pci/devices/0000:01:00.0/power_state:D3hot
> /sys/bus/pci/devices/0000:01:00.1/power_state:D3hot
>
> # lspci -ks $DEV
> 00:01.0 PCI bridge: Intel Corporation Xeon E3-1200 v2/3rd Gen Core processor PCI Express Root Port (rev 09)
> Kernel driver in use: pcieport
> 01:00.0 VGA compatible controller: NVIDIA Corporation GM107 [GeForce GTX 750] (rev a2)
> Subsystem: eVga.com. Corp. Device 2753
> Kernel driver in use: vfio-pci
> 01:00.1 Audio device: NVIDIA Corporation GM107 High Definition Audio Controller [GeForce 940MX] (rev a1)
> Subsystem: eVga.com. Corp. Device 2753
> Kernel driver in use: vfio-pci
> Kernel modules: snd_hda_intel
>
> Any debugging suggestions? Thanks,
Nevermind, I see a whole bunch of reasons in pci_bridge_d3_possible()
that runtime-pm wouldn't support D3hot on this bridge/system. Thanks,
Alex
prev parent reply other threads:[~2022-05-17 20:55 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-17 10:02 [PATCH v4 0/4] vfio/pci: power management changes Abhishek Sahu
2022-05-17 10:02 ` [PATCH v4 1/4] vfio/pci: Invalidate mmaps and block the access in D3hot power state Abhishek Sahu
2022-05-17 23:30 ` kernel test robot
2022-05-17 10:02 ` [PATCH v4 2/4] vfio/pci: Change the PF power state to D0 before enabling VFs Abhishek Sahu
2022-05-17 18:27 ` Alex Williamson
2022-05-18 9:56 ` Abhishek Sahu
2022-05-17 10:02 ` [PATCH v4 3/4] vfio/pci: Virtualize PME related registers bits and initialize to zero Abhishek Sahu
2022-05-17 10:02 ` [PATCH v4 4/4] vfio/pci: Move the unused device into low power state with runtime PM Abhishek Sahu
2022-05-17 20:02 ` Alex Williamson
2022-05-18 10:06 ` Abhishek Sahu
2022-05-17 20:42 ` Alex Williamson
2022-05-17 20:55 ` Alex Williamson [this message]
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